Signed-off-by: Juan Quintela <quint...@redhat.com> --- hw/pxa2xx_dma.c | 90 ++++++++++++++++++++++--------------------------------- 1 files changed, 36 insertions(+), 54 deletions(-)
diff --git a/hw/pxa2xx_dma.c b/hw/pxa2xx_dma.c index 6fd2282..5bed585 100644 --- a/hw/pxa2xx_dma.c +++ b/hw/pxa2xx_dma.c @@ -428,60 +428,42 @@ static CPUWriteMemoryFunc * const pxa2xx_dma_writefn[] = { pxa2xx_dma_write }; -static void pxa2xx_dma_save(QEMUFile *f, void *opaque) -{ - PXA2xxDMAState *s = (PXA2xxDMAState *) opaque; - int i; - - qemu_put_be32(f, s->channels); - - qemu_put_be32s(f, &s->stopintr); - qemu_put_be32s(f, &s->eorintr); - qemu_put_be32s(f, &s->rasintr); - qemu_put_be32s(f, &s->startintr); - qemu_put_be32s(f, &s->endintr); - qemu_put_be32s(f, &s->align); - qemu_put_be32s(f, &s->pio); - - qemu_put_buffer(f, s->req, PXA2XX_DMA_NUM_REQUESTS); - for (i = 0; i < s->channels; i ++) { - qemu_put_betl(f, s->chan[i].descr); - qemu_put_betl(f, s->chan[i].src); - qemu_put_betl(f, s->chan[i].dest); - qemu_put_be32s(f, &s->chan[i].cmd); - qemu_put_be32s(f, &s->chan[i].state); - qemu_put_be32(f, s->chan[i].request); - }; -} +static const VMStateDescription vmstate_dma_channel = { + .name = "PXA2xxDMAChannel", + .version_id = 0, + .minimum_version_id = 0, + .minimum_version_id_old = 0, + .fields = (VMStateField[]) { + VMSTATE_UINTTL(descr, PXA2xxDMAChannel), + VMSTATE_UINTTL(src, PXA2xxDMAChannel), + VMSTATE_UINTTL(dest, PXA2xxDMAChannel), + VMSTATE_UINT32(cmd, PXA2xxDMAChannel), + VMSTATE_UINT32(state, PXA2xxDMAChannel), + VMSTATE_INT32(request, PXA2xxDMAChannel), + VMSTATE_END_OF_LIST() + } +}; -static int pxa2xx_dma_load(QEMUFile *f, void *opaque, int version_id) -{ - PXA2xxDMAState *s = (PXA2xxDMAState *) opaque; - int i; - - if (qemu_get_be32(f) != s->channels) - return -EINVAL; - - qemu_get_be32s(f, &s->stopintr); - qemu_get_be32s(f, &s->eorintr); - qemu_get_be32s(f, &s->rasintr); - qemu_get_be32s(f, &s->startintr); - qemu_get_be32s(f, &s->endintr); - qemu_get_be32s(f, &s->align); - qemu_get_be32s(f, &s->pio); - - qemu_get_buffer(f, s->req, PXA2XX_DMA_NUM_REQUESTS); - for (i = 0; i < s->channels; i ++) { - s->chan[i].descr = qemu_get_betl(f); - s->chan[i].src = qemu_get_betl(f); - s->chan[i].dest = qemu_get_betl(f); - qemu_get_be32s(f, &s->chan[i].cmd); - qemu_get_be32s(f, &s->chan[i].state); - s->chan[i].request = qemu_get_be32(f); - }; - - return 0; -} +static const VMStateDescription vmstate_pxa2xx_dma = { + .name = "pxa2xx_dma", + .version_id = 0, + .minimum_version_id = 0, + .minimum_version_id_old = 0, + .fields = (VMStateField[]) { + VMSTATE_INT32(channels, PXA2xxDMAState), + VMSTATE_UINT32(stopintr, PXA2xxDMAState), + VMSTATE_UINT32(eorintr, PXA2xxDMAState), + VMSTATE_UINT32(rasintr, PXA2xxDMAState), + VMSTATE_UINT32(startintr, PXA2xxDMAState), + VMSTATE_UINT32(endintr, PXA2xxDMAState), + VMSTATE_UINT32(align, PXA2xxDMAState), + VMSTATE_UINT32(pio, PXA2xxDMAState), + VMSTATE_BUFFER(req, PXA2xxDMAState), + VMSTATE_STRUCT_VARRAY_INT32(chan, PXA2xxDMAState, channels, 0, + vmstate_dma_channel, PXA2xxDMAChannel), + VMSTATE_END_OF_LIST() + } +}; static PXA2xxDMAState *pxa2xx_dma_init(target_phys_addr_t base, qemu_irq irq, int channels) @@ -506,7 +488,7 @@ static PXA2xxDMAState *pxa2xx_dma_init(target_phys_addr_t base, pxa2xx_dma_writefn, s, DEVICE_NATIVE_ENDIAN); cpu_register_physical_memory(base, 0x00010000, iomemtype); - register_savevm(NULL, "pxa2xx_dma", 0, 0, pxa2xx_dma_save, pxa2xx_dma_load, s); + vmstate_register(NULL, 0, &vmstate_pxa2xx_dma, s); return s; } -- 1.7.4