On 10/20/18 9:14 AM, Bastian Koppelmann wrote:
@@ -338,27 +375,63 @@ static bool trans_and(DisasContext *ctx, arg_and *a,
uint32_t insn)
static bool trans_addiw(DisasContext *ctx, arg_addiw *a, uint32_t insn)
{
- gen_arith_imm(ctx, OPC_RISC_ADDIW, a->rd, a->rs1, a->imm);
- return true;
+#ifdef TARGET_RISCV64
+ bool res = gen_arith_imm(ctx, a, &tcg_gen_add_tl);
+ tcg_gen_ext32s_tl(cpu_gpr[a->rd], cpu_gpr[a->rd]);
This obviously does not work if a->rd is register zero which is never
allocated.
Cheers,
Bastian