On 29 October 2018 at 23:20, Philippe Mathieu-Daudé <phi...@redhat.com> wrote: > Signed-off-by: Philippe Mathieu-Daudé <phi...@redhat.com> > --- > MAINTAINERS | 1 + > hw/arm/xilinx_zynq.c | 18 ++---------------- > hw/dma/pl330.c | 2 +- > include/hw/dma/pl330.h | 41 +++++++++++++++++++++++++++++++++++++++++ > 4 files changed, 45 insertions(+), 17 deletions(-) > create mode 100644 include/hw/dma/pl330.h
> +static inline void pl330_init(uint32_t base, qemu_irq irq, int nreq) > +{ > + SysBusDevice *busdev; > + DeviceState *dev; > + > + dev = qdev_create(NULL, TYPE_PL330); > + qdev_prop_set_uint8(dev, "num_chnls", 8); > + qdev_prop_set_uint8(dev, "num_periph_req", nreq); > + qdev_prop_set_uint8(dev, "num_events", 16); > + qdev_prop_set_uint8(dev, "data_width", 64); > + qdev_prop_set_uint8(dev, "wr_cap", 8); > + qdev_prop_set_uint8(dev, "wr_q_dep", 16); > + qdev_prop_set_uint8(dev, "rd_cap", 8); > + qdev_prop_set_uint8(dev, "rd_q_dep", 16); > + qdev_prop_set_uint16(dev, "data_buffer_dep", 256); > + qdev_init_nofail(dev); These are the settings the Xilinx board uses, but are they really the settings every SoC that has a PL330 will use ? thanks -- PMM