From: "Dr. David Alan Gilbert" <dgilb...@redhat.com> Define a new capability type 'VIRTIO_PCI_CAP_SHARED_MEMORY_CFG' and the data structure 'virtio_pci_shm_cap' to go with it. They allow defining shared memory regions with sizes and offsets of 2^32 and more. Multiple instances of the capability are allowed and distinguished by a device-specific 'id'.
Signed-off-by: Dr. David Alan Gilbert <dgilb...@redhat.com> --- hw/virtio/virtio-pci.c | 20 ++++++++++++++++++++ include/standard-headers/linux/virtio_pci.h | 9 +++++++++ 2 files changed, 29 insertions(+) diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index a954799267..1e737531b5 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -1163,6 +1163,26 @@ static int virtio_pci_add_mem_cap(VirtIOPCIProxy *proxy, return offset; } +static int virtio_pci_add_shm_cap(VirtIOPCIProxy *proxy, + uint8_t bar, + uint64_t offset, uint64_t length, + uint8_t id) +{ + struct virtio_pci_shm_cap cap = { + .cap.cap_len = sizeof cap, + .cap.cfg_type = VIRTIO_PCI_CAP_SHARED_MEMORY_CFG, + }; + uint32_t mask32 = ~0; + + cap.cap.bar = bar; + cap.cap.length = cpu_to_le32(length & mask32); + cap.length_hi = cpu_to_le32((length >> 32) & mask32); + cap.cap.offset = cpu_to_le32(offset & mask32); + cap.offset_hi = cpu_to_le32((offset >> 32) & mask32); + cap.id = id; + return virtio_pci_add_mem_cap(proxy, &cap.cap); +} + static uint64_t virtio_pci_common_read(void *opaque, hwaddr addr, unsigned size) { diff --git a/include/standard-headers/linux/virtio_pci.h b/include/standard-headers/linux/virtio_pci.h index 9262acd130..745d7a1942 100644 --- a/include/standard-headers/linux/virtio_pci.h +++ b/include/standard-headers/linux/virtio_pci.h @@ -113,6 +113,8 @@ #define VIRTIO_PCI_CAP_DEVICE_CFG 4 /* PCI configuration access */ #define VIRTIO_PCI_CAP_PCI_CFG 5 +/* Additional shared memory capability */ +#define VIRTIO_PCI_CAP_SHARED_MEMORY_CFG 8 /* This is the PCI capability header: */ struct virtio_pci_cap { @@ -163,6 +165,13 @@ struct virtio_pci_cfg_cap { uint8_t pci_cfg_data[4]; /* Data for BAR access. */ }; +struct virtio_pci_shm_cap { + struct virtio_pci_cap cap; + uint32_t offset_hi; /* Most sig 32 bits of offset */ + uint32_t length_hi; /* Most sig 32 bits of length */ + uint8_t id; /* To distinguish shm chunks */ +}; + /* Macro versions of offsets for the Old Timers! */ #define VIRTIO_PCI_CAP_VNDR 0 #define VIRTIO_PCI_CAP_NEXT 1 -- 2.19.2