On Fri, Dec 21, 2018 at 01:36:53AM +0100, Greg Kurz wrote: > PHB hotplug will bring more users for it. Let's define it along with > the PHB defines from which it is derived for simplicity. > > While here fix a misleading comment about manual placement, which was > abandoned with 30b3bc5aa9f4. > > Signed-off-by: Greg Kurz <gr...@kaod.org>
Applied to ppc-for-4.0, thanks. > --- > hw/ppc/spapr.c | 2 -- > include/hw/pci-host/spapr.h | 6 ++++-- > 2 files changed, 4 insertions(+), 4 deletions(-) > > diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c > index 621006eaa862..fe3f9829ae6c 100644 > --- a/hw/ppc/spapr.c > +++ b/hw/ppc/spapr.c > @@ -3838,8 +3838,6 @@ static void spapr_phb_placement(sPAPRMachineState > *spapr, uint32_t index, > * 1TiB 64-bit MMIO windows for each PHB. > */ > const uint64_t base_buid = 0x800000020000000ULL; > -#define SPAPR_MAX_PHBS ((SPAPR_PCI_LIMIT - SPAPR_PCI_BASE) / \ > - SPAPR_PCI_MEM64_WIN_SIZE - 1) > int i; > > /* Sanity check natural alignments */ > diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h > index 9d2ec1a410e8..83d5075a6ef3 100644 > --- a/include/hw/pci-host/spapr.h > +++ b/include/hw/pci-host/spapr.h > @@ -94,11 +94,13 @@ struct sPAPRPHBState { > ((1ULL << 32) - SPAPR_PCI_MEM_WIN_BUS_OFFSET) > #define SPAPR_PCI_MEM64_WIN_SIZE 0x10000000000ULL /* 1 TiB */ > > -/* Without manual configuration, all PCI outbound windows will be > - * within this range */ > +/* All PCI outbound windows will be within this range */ > #define SPAPR_PCI_BASE (1ULL << 45) /* 32 TiB */ > #define SPAPR_PCI_LIMIT (1ULL << 46) /* 64 TiB */ > > +#define SPAPR_MAX_PHBS ((SPAPR_PCI_LIMIT - SPAPR_PCI_BASE) / \ > + SPAPR_PCI_MEM64_WIN_SIZE - 1) > + > #define SPAPR_PCI_2_7_MMIO_WIN_SIZE 0xf80000000 > #define SPAPR_PCI_IO_WIN_SIZE 0x10000 > > -- David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
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