This is for passing through NVIDIA V100 GPUs on POWER9 systems.
This implements a subdriver for NVIDIA V100 GPU with coherent memory and NPU/ATS support available in the POWER9 CPU. 1/3 is not strictly related but since new memory also needs to be mapped to the 64bit DMA window and it is located quite high in the address space, some adjustments are needed. This is based on dwg/ppc-for-4.0 sha1 a0a8bff and requires headers update from v5.0-rc1 staged by Paolo already. Please comment. Thanks. Alexey Kardashevskiy (3): vfio/spapr: Fix indirect levels calculation vfio: Make vfio_get_region_info_cap public spapr: Support NVIDIA V100 GPU with NVLink2 hw/vfio/pci.h | 2 + include/hw/pci-host/spapr.h | 9 + include/hw/ppc/spapr.h | 3 +- include/hw/vfio/vfio-common.h | 2 + hw/ppc/spapr.c | 25 ++- hw/ppc/spapr_pci.c | 333 +++++++++++++++++++++++++++++++++- hw/vfio/common.c | 2 +- hw/vfio/pci-quirks.c | 120 ++++++++++++ hw/vfio/pci.c | 14 ++ hw/vfio/spapr.c | 38 +++- hw/vfio/trace-events | 6 +- 11 files changed, 539 insertions(+), 15 deletions(-) -- 2.17.1
