On Fri, Jan 25, 2019 at 7:26 PM Peter Maydell <peter.mayd...@linaro.org> wrote: > > In the AdvSIMD load/store multiple structures encodings, > the non-post-indexed case should have zeroes in [20:16] > (which is the Rm field for the post-indexed case). > Correctly UNDEF the currently unallocated encodings which > have non-zeroes in those bits. > > Reported-by: Laurent Desnogues <laurent.desnog...@gmail.com> > Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Laurent Desnogues <laurent.desnog...@gmail.com> Thanks, Laurent > --- > target/arm/translate-a64.c | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c > index 8e081758e03..c1f0cad7691 100644 > --- a/target/arm/translate-a64.c > +++ b/target/arm/translate-a64.c > @@ -3249,6 +3249,7 @@ static void disas_ldst_multiple_struct(DisasContext *s, > uint32_t insn) > { > int rt = extract32(insn, 0, 5); > int rn = extract32(insn, 5, 5); > + int rm = extract32(insn, 16, 5); > int size = extract32(insn, 10, 2); > int opcode = extract32(insn, 12, 4); > bool is_store = !extract32(insn, 22, 1); > @@ -3268,6 +3269,11 @@ static void disas_ldst_multiple_struct(DisasContext > *s, uint32_t insn) > return; > } > > + if (!is_postidx && rm != 0) { > + unallocated_encoding(s); > + return; > + } > + > /* From the shared decode logic */ > switch (opcode) { > case 0x0: > @@ -3367,7 +3373,6 @@ static void disas_ldst_multiple_struct(DisasContext *s, > uint32_t insn) > } > > if (is_postidx) { > - int rm = extract32(insn, 16, 5); > if (rm == 31) { > tcg_gen_mov_i64(tcg_rn, tcg_addr); > } else { > -- > 2.20.1 >