On Sun, 10 Feb 2019 at 01:23, Richard Henderson <richard.hender...@linaro.org> wrote: > > On 2/5/19 11:27 AM, Peter Maydell wrote: > >> +++ b/target/arm/translate-a64.c > >> @@ -1668,6 +1668,17 @@ static void handle_msr_i(DisasContext *s, uint32_t > >> insn, > >> s->base.is_jmp = DISAS_UPDATE; > >> break; > >> > >> + case 0x1c: /* TCO */ > >> + if (!dc_isar_feature(aa64_mte_insn_reg, s)) { > >> + goto do_unallocated; > >> + } > >> + if (crm & 1) { > >> + set_pstate_bits(PSTATE_TCO); > >> + } else { > >> + clear_pstate_bits(PSTATE_TCO); > >> + } > >> + break; > > Don't we need to break the TB here or something to pick up > > the new value of TCO when we generate code for a following > > load or store ? (TCO is self-synchronizing so there is no > > requirement for an ISB before it takes effect.) > > Actually, we already break the TB here by default.
Do we? I didn't see any code (apart from the handling in the DAIFSet/Clear codepaths, which aren't used for TCO). thanks -- PMM