From: Bastian Koppelmann <kbast...@mail.uni-paderborn.de> CPURISCVState is rarely used, so there is no need to pass it to every translate function. This paves the way for decodetree which only passes DisasContext to translate functions.
Reviewed-by: Palmer Dabbelt <pal...@sifive.com> Reviewed-by: Richard Henderson <richard.hender...@linaro.org> Reviewed-by: Alistair Francis <alistair.fran...@wdc.com> Signed-off-by: Bastian Koppelmann <kbast...@mail.uni-paderborn.de> --- target/riscv/translate.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/target/riscv/translate.c b/target/riscv/translate.c index b7176cbf98e1..9e06eb8c2de5 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -54,6 +54,7 @@ typedef struct DisasContext { to any system register, which includes CSR_FRM, so we do not have to reset this known value. */ int frm; + CPURISCVState *env; } DisasContext; /* convert riscv funct3 to qemu memop for load/store */ @@ -2003,7 +2004,7 @@ static void decode_opc(DisasContext *ctx) { /* check for compressed insn */ if (extract32(ctx->opcode, 0, 2) != 3) { - if (!has_ext(ctx, RVC)) { + if (!riscv_has_ext(ctx->env, RVC)) { gen_exception_illegal(ctx); } else { ctx->pc_succ_insn = ctx->base.pc_next + 2; @@ -2058,9 +2059,9 @@ static bool riscv_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cpu, static void riscv_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) { DisasContext *ctx = container_of(dcbase, DisasContext, base); - CPURISCVState *env = cpu->env_ptr; + ctx->env = cpu->env_ptr; - ctx->opcode = cpu_ldl_code(env, ctx->base.pc_next); + ctx->opcode = cpu_ldl_code(ctx->env, ctx->base.pc_next); decode_opc(ctx); ctx->base.pc_next = ctx->pc_succ_insn; -- 2.18.1