On 2/19/19 4:58 AM, Peter Maydell wrote: > The CPUWAIT register acts as a sort of power-control: if a bit > in it is 1 then the CPU will have been forced into waiting > when the system was reset (which in QEMU we model as the > CPU starting powered off). Writing a 0 to the register will > allow the CPU to boot (for QEMU, we model this as powering > it on). Note that writing 0 to the register does not power > off a CPU. > > For this to work correctly we need to also honour the > INITSVTOR* registers, which let the guest control where the > CPU will load its SP and PC from when it comes out of reset. > > Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> > --- > hw/misc/iotkit-sysctl.c | 41 +++++++++++++++++++++++++++++++++++++---- > 1 file changed, 37 insertions(+), 4 deletions(-)
Reviewed-by: Richard Henderson <richard.hender...@linaro.org> r~
