Very similar to VECTOR LOAD GR FROM VR ELEMENT, just the opposite direction.
Signed-off-by: David Hildenbrand <da...@redhat.com> --- target/s390x/insn-data.def | 2 ++ target/s390x/translate_vx.inc.c | 33 +++++++++++++++++++++++++++++++++ 2 files changed, 35 insertions(+) diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index 2ab88938ff..8b6957b750 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -1004,6 +1004,8 @@ F(0xe736, VLM, VRS_a, V, la2, 0, 0, 0, vlm, 0, IF_VEC) /* VECTOR LOAD TO BLOCK BOUNDARY */ F(0xe707, VLBB, VRX, V, la2, 0, 0, 0, vlbb, 0, IF_VEC) +/* VECTOR LOAD VR ELEMENT FROM GR */ + F(0xe722, VLVG, VRS_b, V, la2, r3, 0, 0, vlvg, 0, IF_VEC) #ifndef CONFIG_USER_ONLY /* COMPARE AND SWAP AND PURGE */ diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c index b5ed3bd89f..edf471b8a7 100644 --- a/target/s390x/translate_vx.inc.c +++ b/target/s390x/translate_vx.inc.c @@ -428,3 +428,36 @@ static DisasJumpType op_vlbb(DisasContext *s, DisasOps *o) tcg_temp_free_ptr(a0); return DISAS_NEXT; } + +static DisasJumpType op_vlvg(DisasContext *s, DisasOps *o) +{ + const uint8_t es = get_field(s->fields, m4); + TCGv_ptr ptr; + + if (es > MO_64) { + gen_program_exception(s, PGM_SPECIFICATION); + return DISAS_NORETURN; + } + + ptr = tcg_temp_new_ptr(); + get_vec_element_ptr_i64(ptr, get_field(s->fields, v1), o->addr1, es); + switch (es) { + case MO_8: + tcg_gen_st8_i64(o->in2, ptr, 0); + break; + case MO_16: + tcg_gen_st16_i64(o->in2, ptr, 0); + break; + case MO_32: + tcg_gen_st32_i64(o->in2, ptr, 0); + break; + case MO_64: + tcg_gen_st_i64(o->in2, ptr, 0); + break; + default: + g_assert_not_reached(); + } + tcg_temp_free_ptr(ptr); + + return DISAS_NEXT; +} -- 2.17.2