Patchew URL: https://patchew.org/QEMU/20190228110835.16159-1-peter.mayd...@linaro.org/
Hi, This series seems to have some coding style problems. See output below for more information: Message-id: 20190228110835.16159-1-peter.mayd...@linaro.org Subject: [Qemu-devel] [PULL 00/16] target-arm queue Type: series === TEST SCRIPT BEGIN === #!/bin/bash git rev-parse base > /dev/null || exit 0 git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu adf2e451f3..1387294169 master -> master * [new tag] patchew/20190228110835.16159-1-peter.mayd...@linaro.org -> patchew/20190228110835.16159-1-peter.mayd...@linaro.org Switched to a new branch 'test' 7cd462af85 linux-user: Enable HWCAP_ASIMDFHM, HWCAP_JSCVT 6536b571b0 target/arm: Enable ARMv8.2-FHM for -cpu max 70f6e32c72 target/arm: Implement VFMAL and VFMSL for aarch32 a18f0eab46 target/arm: Implement FMLAL and FMLSL for aarch64 6388d5b402 target/arm: Add helpers for FMLAL 529f51ac2d Revert "arm: Allow system registers for KVM guests to be changed by QEMU code" d427f6c5f4 target/arm: Gate "miscellaneous FP" insns by ID register field af68a3364d target/arm: Use MVFR1 feature bits to gate A32/T32 FP16 instructions ed368e7cc1 hw/arm/armsse: Unify init-svtor and cpuwait handling 4d50cc7660 hw/arm/iotkit-sysctl: Implement CPUWAIT and INITSVTOR* bc9df41f99 hw/arm/iotkit-sysctl: Add SSE-200 registers 7c9c58f708 hw/misc/iotkit-sysctl: Correct typo in INITSVTOR0 register name f97260c638 target/arm/arm-powerctl: Add new arm_set_cpu_on_and_reset() 49b3caa8e4 target/arm/cpu: Allow init-svtor property to be set after realize 3bdc5052d4 hw/arm/armsse: Wire up the MHUs d2bd880083 hw/misc/armsse-mhu.c: Model the SSE-200 Message Handling Unit === OUTPUT BEGIN === 1/16 Checking commit d2bd88008302 (hw/misc/armsse-mhu.c: Model the SSE-200 Message Handling Unit) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #55: new file mode 100644 total: 0 errors, 1 warnings, 271 lines checked Patch 1/16 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 2/16 Checking commit 3bdc5052d4d4 (hw/arm/armsse: Wire up the MHUs) 3/16 Checking commit 49b3caa8e4b3 (target/arm/cpu: Allow init-svtor property to be set after realize) 4/16 Checking commit f97260c6386b (target/arm/arm-powerctl: Add new arm_set_cpu_on_and_reset()) 5/16 Checking commit 7c9c58f708c9 (hw/misc/iotkit-sysctl: Correct typo in INITSVTOR0 register name) 6/16 Checking commit bc9df41f9942 (hw/arm/iotkit-sysctl: Add SSE-200 registers) ERROR: spaces required around that '*' (ctx:VxV) #352: FILE: hw/misc/iotkit-sysctl.c:462: + .subsections = (const VMStateDescription*[]) { ^ total: 1 errors, 0 warnings, 372 lines checked Patch 6/16 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 7/16 Checking commit 4d50cc7660f9 (hw/arm/iotkit-sysctl: Implement CPUWAIT and INITSVTOR*) 8/16 Checking commit ed368e7cc1e3 (hw/arm/armsse: Unify init-svtor and cpuwait handling) 9/16 Checking commit af68a3364d4f (target/arm: Use MVFR1 feature bits to gate A32/T32 FP16 instructions) 10/16 Checking commit d427f6c5f4aa (target/arm: Gate "miscellaneous FP" insns by ID register field) 11/16 Checking commit 529f51ac2d97 (Revert "arm: Allow system registers for KVM guests to be changed by QEMU code") WARNING: Block comments use a leading /* on a separate line #129: FILE: target/arm/kvm32.c:387: + /* Note that we do not call write_cpustate_to_list() total: 0 errors, 1 warnings, 113 lines checked Patch 11/16 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 12/16 Checking commit 6388d5b4022e (target/arm: Add helpers for FMLAL) 13/16 Checking commit a18f0eab46b3 (target/arm: Implement FMLAL and FMLSL for aarch64) 14/16 Checking commit 70f6e32c72c8 (target/arm: Implement VFMAL and VFMSL for aarch32) 15/16 Checking commit 6536b571b00d (target/arm: Enable ARMv8.2-FHM for -cpu max) 16/16 Checking commit 7cd462af8528 (linux-user: Enable HWCAP_ASIMDFHM, HWCAP_JSCVT) === OUTPUT END === Test command exited with code: 1 The full log is available at http://patchew.org/logs/20190228110835.16159-1-peter.mayd...@linaro.org/testing.checkpatch/?type=message. --- Email generated automatically by Patchew [http://patchew.org/]. Please send your feedback to patchew-de...@redhat.com
