On Fri, Mar 01, 2019 at 10:28:30AM +0800, Heyi Guo wrote:
> After the introduction of generic PCIe root port and PCIe-PCI bridge,
> we will also have SHPC controller on ARM, so just enalbe SHPC native
> hot plug.
>
> Cc: Shannon Zhao <shannon.zha...@gmail.com>
> Cc: Peter Maydell <peter.mayd...@linaro.org>
> Cc: "Michael S. Tsirkin" <m...@redhat.com>
> Cc: Igor Mammedov <imamm...@redhat.com>
> Signed-off-by: Heyi Guo <guoh...@huawei.com>
> Signed-off-by: Heyi Guo <heyi....@linaro.org>
I don't think you need two Signed-off-by lines.
Besides that:
Reviewed-by: Michael S. Tsirkin <m...@redhat.com>
Pls feel free to merge through the ARM tree.
> ---
> hw/arm/virt-acpi-build.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index 04b62c7..7849ec5 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const
> MemMapEntry *memmap,
> aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
> aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
> aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
> - aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D),
> NULL),
> +
> + /*
> + * Allow OS control for all 5 features:
> + * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
> + */
> + aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1F),
> NULL),
> aml_name("CTRL")));
>
> ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
> --
> 1.8.3.1
