>
> From: Peter Maydell <peter.mayd...@linaro.org>
> Subject: Re: [PATCH v3] target/mips: Fix minor bug in FPU
>
> On Tue, 19 Mar 2019 at 19:21, Aleksandar Markovic
> <amarko...@wavecomp.com> wrote:
> >
> > > From: Mateja Marjanovic <mateja.marjano...@rt-rk.com>
> > > Subject: [PATCH v3] target/mips: Fix minor bug in FPU
> > >
> > > From: Mateja Marjanovic <mateja.marjano...@rt-rk.com>
> > >
> > > Wrong type of NaN was generated for IEEE 754-2008 by MADDF.<D|S> and
> > > MSUBF.<D|S> instructions when the arguments were (inf, zero, nan) or
> > > (zero, inf, nan).
> > > These instructions were tested and the results match with the results
> > > of the machine that has a MIPS64 r6 cpu.
> > >
> > > Signed-off-by: Mateja Marjanovic <mateja.marjano...@rt-rk.com>
> > > ---
> >
> > Mateja,
> >
> > The commit message is missing information on the reference source
> > of information, that you placed in the cover letter. In my opinion, this is
> > an important peace of information for anybody seeing and examining
> > this patch in future, so please submit a new version of the patch as an
> > isolated patch and updated commit message.
>
> If Alex is willing to edit the commit message in his tree
> that would save Mateja from having to do another respin.
>
Sure, that would be a good option. Whoever (Alex or Mateja) modifies
the patch, the commit message should please read: (I did some
rearranging and editing)
Wrong type of NaN was generated for IEEE 754-2008 by MADDF.<D|S> and
MSUBF.<D|S> instructions when the arguments were (Inf, Zero, NaN) or
(Zero, Inf, NaN).
The if-else statement establishes if the system conforms to IEEE
754-1985 or IEEE 754-2008, and defines different behaviors depending
on that. In case of IEEE 754-2008, in mentioned cases of inputs,
<MADDF|MSUBF>.<D|S> returns the input value 'c' [2] (page 53) and
raises floating point exception 'Invalid Operation' [1] (pages 349,
350).
These scenarios were tested and the results in QEMU emulation match
the results obtained on the machine that has a MIPS64R6 CPU.
[1] MIPS Architecture for Programmers Volume II-a: The MIPS64
Instruction Set Reference Manual, Revision 6.06
[2] MIPS Architecture for Programmers Volume IV-j: The MIPS64
SIMD Architecture Module, Revision 1.12
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Mateja Marjanovic <mateja.marjano...@rt-rk.com>
> thanks
> -- PMM
