On Sat, 13 Apr 2019 at 08:07, Richard Henderson <richard.hender...@linaro.org> wrote: > > On 4/11/19 5:39 AM, Peter Maydell wrote: > > +static uint64_t cptr_el2_read(CPUARMState *env, const ARMCPRegInfo *ri) > > +{ > > + /* > > + * For A-profile AArch32 EL3, if NSACR.CP10 > > + * is 0 then HCPTR.{TCP11,TCP10} ignore writes and read as 1. > > + */ > > + uint64_t value = env->cp15.cptr_el[2]; > > + > > + if (arm_feature(env, ARM_FEATURE_EL3) && !arm_el_is_aa64(env, 3) && > > + !arm_is_secure(env) && !extract32(env->cp15.nsacr, 10, 1)) { > > + value &= ~(0x3 << 10); > > Read as 1, and yet you're clearing the value? Cut-n-paste error from CPACR? > Surely better to do nothing on read, but set on write (to either HCPTR or > NSACR). > > > +static uint64_t cpacr_read(CPUARMState *env, const ARMCPRegInfo *ri) > > +{ > > + /* > > + * For A-profile AArch32 EL3 (but not M-profile secure mode), if > > NSACR.CP10 > > + * is 0 then CPACR.{CP11,CP10} ignore writes and read as 0b00. > > + */ > > + uint64_t value = env->cp15.cpacr_el1; > > + > > + if (arm_feature(env, ARM_FEATURE_EL3) && !arm_el_is_aa64(env, 3) && > > + !arm_is_secure(env) && !extract32(env->cp15.nsacr, 10, 1)) { > > + value &= ~(0xf << 20); > > + } > > This one does do the right thing, but better to clear the bits on write to > NSACR. This lets you avoid the change to fp_exception_el, and the missing > change to sve_exception_el.
Hi Richard -- I was just going through the review comments on this patchset, and I saw this bit. Could you clarify what you mean by "the missing change to sve_exception_el" ? Since SVE is AArch64 only, there can't be any configs where we have SVE and EL3 is AArch32, so I don't think these two features should be able to interact. thanks -- PMM