On 30/04/2019 17:47, Richard Henderson wrote:
> On 4/28/19 7:38 AM, Mark Cave-Ayland wrote:
>> +#define GEN_VSX_HELPER_R3(name, op1, op2, inval, type)
>> \
>> +static void gen_##name(DisasContext *ctx)
>> \
>> +{
>> \
>> + TCGv_i32 opc;
>> \
>> + TCGv_ptr xt, xa, xb;
>> \
>> + if (unlikely(!ctx->vsx_enabled)) {
>> \
>> + gen_exception(ctx, POWERPC_EXCP_VSXU);
>> \
>> + return;
>> \
>> + }
>> \
>> + opc = tcg_const_i32(ctx->opcode);
>> \
>> + xt = gen_vsr_ptr(rD(ctx->opcode) + 32);
>> \
>> + xa = gen_vsr_ptr(rA(ctx->opcode) + 32);
>> \
>> + xb = gen_vsr_ptr(rB(ctx->opcode) + 32);
>> \
>> + gen_helper_##name(cpu_env, opc, xt, xa, xb);
>> \
>
> Is opc still used here? Otherwise,
>
> Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Yeah, looks like it's used for the rounding mode. I'll have a look and see how
this
compares with the previous case.
ATB,
Mark.
