Changes from v1:
* Do not unify user-only and system tlb_fill functions
(alpha, microblaze, nios2, s390x, sparc, xtensa).
* Split the mips patch into multiple.
* Other random changes per review.
Patches without review:
0009-target-microblaze-Convert-to-CPUClass-tlb_fill.patch
0010-target-mips-Pass-a-valid-error-to-raise_mmu_excep.patch (new)
0011-target-mips-Tidy-control-flow-in-mips_cpu_handle_.patch (new)
0012-target-mips-Convert-to-CPUClass-tlb_fill.patch
0014-target-nios2-Convert-to-CPUClass-tlb_fill.patch
0018-target-s390x-Convert-to-CPUClass-tlb_fill.patch
0020-target-sparc-Convert-to-CPUClass-tlb_fill.patch
0024-target-xtensa-Convert-to-CPUClass-tlb_fill.patch
Blurb from v1:
There is currently a lot of confusion between foo_cpu_handle_mmu_fault
and tlb_fill.
In particular, foo_cpu_handle_mmu_fault was only defined for user-only,
and its only valid action was to set up the cpu for cpu_loop_exit so
that we can deliver a SIGSEGV to the guest. And yet, we had code that
tried to return from the host SIGSEGV handler to retry the instruction.
We had, for some targets, a definition of foo_cpu_handle_mmu_fault
for softmmu. Sometimes this was called from tlb_fill, sometimes not.
Finally, we have a use case for SVE that wants a non-faulting tlb_fill,
so while we're changing the interface, let's go ahead and include that.
r~
Richard Henderson (27):
tcg: Add CPUClass::tlb_fill
target/alpha: Convert to CPUClass::tlb_fill
target/arm: Convert to CPUClass::tlb_fill
target/cris: Convert to CPUClass::tlb_fill
target/hppa: Convert to CPUClass::tlb_fill
target/i386: Convert to CPUClass::tlb_fill
target/lm32: Convert to CPUClass::tlb_fill
target/m68k: Convert to CPUClass::tlb_fill
target/microblaze: Convert to CPUClass::tlb_fill
target/mips: Pass a valid error to raise_mmu_exception for user-only
target/mips: Tidy control flow in mips_cpu_handle_mmu_fault
target/mips: Convert to CPUClass::tlb_fill
target/moxie: Convert to CPUClass::tlb_fill
target/nios2: Convert to CPUClass::tlb_fill
target/openrisc: Convert to CPUClass::tlb_fill
target/ppc: Convert to CPUClass::tlb_fill
target/riscv: Convert to CPUClass::tlb_fill
target/s390x: Convert to CPUClass::tlb_fill
target/sh4: Convert to CPUClass::tlb_fill
target/sparc: Convert to CPUClass::tlb_fill
target/tilegx: Convert to CPUClass::tlb_fill
target/tricore: Convert to CPUClass::tlb_fill
target/unicore32: Convert to CPUClass::tlb_fill
target/xtensa: Convert to CPUClass::tlb_fill
tcg: Use CPUClass::tlb_fill in cputlb.c
tcg: Remove CPUClass::handle_mmu_fault
tcg: Use tlb_fill probe from tlb_vaddr_to_host
include/exec/cpu_ldst.h | 50 ++-------
include/exec/exec-all.h | 9 --
include/qom/cpu.h | 12 +-
target/alpha/cpu.h | 5 +-
target/arm/internals.h | 10 +-
target/cris/cpu.h | 5 +-
target/hppa/cpu.h | 8 +-
target/i386/cpu.h | 5 +-
target/lm32/cpu.h | 5 +-
target/m68k/cpu.h | 5 +-
target/microblaze/cpu.h | 5 +-
target/mips/internal.h | 5 +-
target/moxie/cpu.h | 5 +-
target/nios2/cpu.h | 5 +-
target/openrisc/cpu.h | 5 +-
target/ppc/cpu.h | 7 +-
target/riscv/cpu.h | 5 +-
target/s390x/internal.h | 5 +-
target/sh4/cpu.h | 5 +-
target/sparc/cpu.h | 5 +-
target/tricore/cpu.h | 6 +-
target/unicore32/cpu.h | 5 +-
target/xtensa/cpu.h | 5 +-
accel/tcg/cputlb.c | 88 +++++++++++++--
accel/tcg/user-exec.c | 36 ++----
target/alpha/cpu.c | 5 +-
target/alpha/helper.c | 24 ++--
target/alpha/mem_helper.c | 16 ---
target/arm/cpu.c | 22 +---
target/arm/helper.c | 90 ++++++++-------
target/arm/op_helper.c | 29 +----
target/arm/sve_helper.c | 6 +-
target/cris/cpu.c | 5 +-
target/cris/helper.c | 61 ++++++-----
target/cris/op_helper.c | 28 -----
target/hppa/cpu.c | 5 +-
target/hppa/mem_helper.c | 16 ++-
target/i386/cpu.c | 5 +-
target/i386/excp_helper.c | 53 +++++----
target/i386/mem_helper.c | 21 ----
target/lm32/cpu.c | 5 +-
target/lm32/helper.c | 8 +-
target/lm32/op_helper.c | 16 ---
target/m68k/cpu.c | 2 +-
target/m68k/helper.c | 89 ++++++++-------
target/m68k/op_helper.c | 15 ---
target/microblaze/cpu.c | 5 +-
target/microblaze/helper.c | 101 ++++++++---------
target/microblaze/op_helper.c | 19 ----
target/mips/cpu.c | 5 +-
target/mips/helper.c | 81 ++++++--------
target/mips/op_helper.c | 15 ---
target/moxie/cpu.c | 5 +-
target/moxie/helper.c | 65 +++--------
target/nios2/cpu.c | 5 +-
target/nios2/helper.c | 166 ++++++++++++++--------------
target/nios2/mmu.c | 12 --
target/openrisc/cpu.c | 5 +-
target/openrisc/mmu.c | 69 ++++++------
target/ppc/mmu_helper.c | 16 ++-
target/ppc/translate_init.inc.c | 5 +-
target/ppc/user_only_helper.c | 14 ++-
target/riscv/cpu.c | 5 +-
target/riscv/cpu_helper.c | 50 ++++-----
target/s390x/cpu.c | 5 +-
target/s390x/excp_helper.c | 67 +++++++----
target/s390x/mem_helper.c | 16 ---
target/sh4/cpu.c | 5 +-
target/sh4/helper.c | 189 +++++++++++++++-----------------
target/sh4/op_helper.c | 12 --
target/sparc/cpu.c | 5 +-
target/sparc/ldst_helper.c | 15 ---
target/sparc/mmu_helper.c | 78 +++++++------
target/tilegx/cpu.c | 10 +-
target/tricore/cpu.c | 1 +
target/tricore/helper.c | 23 ++--
target/tricore/op_helper.c | 26 -----
target/unicore32/cpu.c | 5 +-
target/unicore32/helper.c | 23 ----
target/unicore32/op_helper.c | 14 ---
target/unicore32/softmmu.c | 13 ++-
target/xtensa/cpu.c | 5 +-
target/xtensa/helper.c | 33 +++---
83 files changed, 876 insertions(+), 1139 deletions(-)
--
2.17.1
