On 04/20/2011 02:06 AM, Tristan Gingold wrote: > * sx164 is ev56 based, isn't it ? It would be nice if cpu version specific > code is clearly marked.
Yes, but most importantly it is the most evolved of the single hose systems. QEMU is nowhere near ready to deal with multiple PCI host controllers, and multiple ISA buses. I actually planned on emulating an EV67 but using the SX164 HW. I think the Linux kernel will be that forgiving... > In particular (and IIRC), pal mode for ev6 is much closer to ev4 than to > ev5. Don't know about ev7. > It would be nice if we could easily support both ev5 and ev6. Ah, see, here's where there may be some confusion... I'm not implementing any of the real cpu ISRs. I'm not using any of the real PALcode. I'm implementing my own QEMU-specific ISRs and and writing my own PALcode, starting with MILO's PALcode but I've diverged significantly since. I'm also cheating a bit and implementing a number of the simple CALL_PALs inline in QEMU. But that really started when I discovered how confused gdb could get attempting to step across a transition to/from PALmode. > * Yes, executive and supervisor are used only by VMS (well AFAIK). I'd like > to support it. Well, if you'd like to help write the PALcode for VMS, sure. It certainly looks like a larger job than the Unix PALcode. > Did you try to also support the windows mmu mode ? Nope. I can't really imagine that being of interest to anyone. r~
