Stop using cpu_F0s for the NEON_2RM_VCVT[ANPM][US] ops. Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> Reviewed-by: Richard Henderson <richard.hender...@linaro.org> Tested-by: Philippe Mathieu-Daudé <phi...@redhat.com> Message-id: 20190613163917.28589-7-peter.mayd...@linaro.org --- target/arm/translate.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c index 243dbee8357..124045a9ef6 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -4181,8 +4181,7 @@ static int neon_2rm_is_float_op(int op) * what we are asking here is "does the code for this case in * the Neon for-each-pass loop use cpu_F0s?". */ - return ((op >= NEON_2RM_VCVTAU && op <= NEON_2RM_VCVTMS) || - op >= NEON_2RM_VRECPE_F); + return op >= NEON_2RM_VRECPE_F; } static bool neon_2rm_is_v8_op(int op) @@ -6818,10 +6817,10 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) cpu_env); if (is_signed) { - gen_helper_vfp_tosls(cpu_F0s, cpu_F0s, + gen_helper_vfp_tosls(tmp, tmp, tcg_shift, fpst); } else { - gen_helper_vfp_touls(cpu_F0s, cpu_F0s, + gen_helper_vfp_touls(tmp, tmp, tcg_shift, fpst); } -- 2.20.1