Hi Howard,
Thanks for letting me know about compilation errors in my patch, I really appreciate it. Those should be fixed in the latest version of this patch (v3), so please take a look and let me know if there is anything else that should be changed. Kind Regards, Stefan -------- Original Message -------- Subject: [PATCH v3 0/8] target/ppc: Optimize emulation of some Altivec Date: Monday, June 24, 2019 12:10 CEST From: Stefan Brankovic <stefan.branko...@rt-rk.com> To: stefan.branko...@rt-rk.com Optimize emulation of ten Altivec instructions: lvsl, lvsr, vsl, vsr, vpkpx, vgbbd, vclzb, vclzh, vclzw and vclzd. This series buils up on and complements recent work of Thomas Murta, Mark Cave-Ayland and Richard Henderson in the same area. It is based on devising TCG translation implementation for selected instructions rather than using helpers. The selected instructions are most of the time idiosyncratic to ppc platform, so relatively complex TCG translation (without direct mapping to host instruction that is not possible in these cases) seems to be the best option, and that approach is presented in this series. The performance improvements are significant in all cases. V3: Fixed problem during build. V2: Addressed Richard's Henderson's suggestions. Fixed problem during build on patch 2/8. Rebased series to the latest qemu code. Stefan Brankovic (8): target/ppc: Optimize emulation of lvsl and lvsr instructions target/ppc: Optimize emulation of vsl and vsr instructions target/ppc: Optimize emulation of vpkpx instruction target/ppc: Optimize emulation of vgbbd instruction target/ppc: Optimize emulation of vclzd instruction target/ppc: Optimize emulation of vclzw instruction target/ppc: Optimize emulation of vclzh and vclzb instructions target/ppc: Refactor emulation of vmrgew and vmrgow instructions target/ppc/helper.h | 10 - target/ppc/int_helper.c | 365 -------------------- target/ppc/translate/vmx-impl.inc.c | 642 ++++++++++++++++++++++++++++++++---- 3 files changed, 573 insertions(+), 444 deletions(-) -- 2.7.4
