On 6/19/19 1:03 PM, Stefan Brankovic wrote: > Adding simple macro that is calling tcg implementation of appropriate > instruction if altivec support is active. > > Optimization of altivec instruction lvsl (Load Vector for Shift Left). > Place bytes sh:sh+15 of value 0x00 || 0x01 || 0x02 || ... || 0x1E || 0x1F > in destination register. Sh is calculated by adding 2 source registers and > getting bits 60-63 of result. > > First, the bits [28-31] are placed from EA to variable sh. After that, > the bytes are created in the following way: > sh:(sh+7) of X(from description) by multiplying sh with 0x0101010101010101 > followed by addition of the result with 0x0001020304050607. Value obtained > is placed in higher doubleword element of vD. > (sh+8):(sh+15) by adding the result of previous multiplication with > 0x08090a0b0c0d0e0f. Value obtained is placed in lower doubleword element > of vD. > > Optimization of altivec instruction lvsr (Load Vector for Shift Right). > Place bytes 16-sh:31-sh of value 0x00 || 0x01 || 0x02 || ... || 0x1E || > 0x1F in destination register. Sh is calculated by adding 2 source > registers and getting bits 60-63 of result. > > First, the bits [28-31] are placed from EA to variable sh. After that, > the bytes are created in the following way: > sh:(sh+7) of X(from description) by multiplying sh with 0x0101010101010101 > followed by substraction of the result from 0x1011121314151617. Value > obtained is placed in higher doubleword element of vD. > (sh+8):(sh+15) by substracting the result of previous multiplication from > 0x18191a1b1c1d1e1f. Value obtained is placed in lower doubleword element > of vD. > > Signed-off-by: Stefan Brankovic <stefan.branko...@rt-rk.com> > --- > target/ppc/helper.h | 2 - > target/ppc/int_helper.c | 18 ------ > target/ppc/translate/vmx-impl.inc.c | 120 > ++++++++++++++++++++++++++---------- > 3 files changed, 88 insertions(+), 52 deletions(-)
Reviewed-by: Richard Henderson <richard.hender...@linaro.org> r~
