Per Peter Maydell: Semihosting hooks either SVC or HLT instructions, and inside KVM both of those go to EL1, ie to the guest, and can't be trapped to KVM.
Let check_for_semihosting() return False when not running on TCG. Signed-off-by: Philippe Mathieu-Daudé <phi...@redhat.com> --- v3: inline call to g_assert_not_reached if !TCG --- target/arm/Makefile.objs | 2 +- target/arm/cpu.h | 7 +++++++ target/arm/helper.c | 4 +++- 3 files changed, 11 insertions(+), 2 deletions(-) diff --git a/target/arm/Makefile.objs b/target/arm/Makefile.objs index 294433da88..82bedefc3d 100644 --- a/target/arm/Makefile.objs +++ b/target/arm/Makefile.objs @@ -1,4 +1,4 @@ -obj-y += arm-semi.o +obj-$(CONFIG_TCG) += arm-semi.o obj-y += helper.o vfp_helper.o obj-y += cpu.o gdbstub.o obj-$(TARGET_AARCH64) += cpu64.o gdbstub64.o diff --git a/target/arm/cpu.h b/target/arm/cpu.h index a9be18660f..94c990cddb 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -964,7 +964,14 @@ static inline void aarch64_sve_change_el(CPUARMState *env, int o, { } #endif +#if !defined(CONFIG_TCG) +static inline target_ulong do_arm_semihosting(CPUARMState *env) +{ + g_assert_not_reached(); +} +#else target_ulong do_arm_semihosting(CPUARMState *env); +#endif void aarch64_sync_32_to_64(CPUARMState *env); void aarch64_sync_64_to_32(CPUARMState *env); diff --git a/target/arm/helper.c b/target/arm/helper.c index 49a0f05cd1..1b4da7aa45 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -20,7 +20,6 @@ #include "qemu/qemu-print.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" -#include "arm_ldst.h" #include <zlib.h> /* For crc32 */ #include "hw/semihosting/semihost.h" #include "sysemu/cpus.h" @@ -29,6 +28,9 @@ #include "qapi/qapi-commands-target.h" #include "qapi/error.h" #include "qemu/guest-random.h" +#ifdef CONFIG_TCG +#include "arm_ldst.h" +#endif #define ARM_CPU_FREQ 1000000000 /* FIXME: 1 GHz, should be configurable */ -- 2.20.1