KVM requires at least a ARMv7 cpu. Signed-off-by: Philippe Mathieu-Daudé <phi...@redhat.com> --- target/arm/cpu.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c index ca718fb38f..290ef16e52 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1643,6 +1643,8 @@ static ObjectClass *arm_cpu_class_by_name(const char *cpu_model) /* CPU models. These are not needed for the AArch64 linux-user build. */ #if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64) +#ifdef CONFIG_TCG + static void arm926_initfn(Object *obj) { ARMCPU *cpu = ARM_CPU(obj); @@ -1853,6 +1855,8 @@ static void cortex_m0_initfn(Object *obj) cpu->midr = 0x410cc200; } +#endif + static void cortex_m3_initfn(Object *obj) { ARMCPU *cpu = ARM_CPU(obj); @@ -2234,6 +2238,8 @@ static void cortex_a15_initfn(Object *obj) define_arm_cp_regs(cpu, cortexa15_cp_reginfo); } +#ifdef CONFIG_TCG + static void ti925t_initfn(Object *obj) { ARMCPU *cpu = ARM_CPU(obj); @@ -2402,6 +2408,8 @@ static void pxa270c5_initfn(Object *obj) cpu->reset_sctlr = 0x00000078; } +#endif + #ifndef TARGET_AARCH64 /* -cpu max: if KVM is enabled, like -cpu host (best possible with this host); * otherwise, a CPU with as many features enabled as our emulation supports. @@ -2470,6 +2478,7 @@ struct ARMCPUInfo { static const ARMCPUInfo arm_cpus[] = { #if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64) +#ifdef CONFIG_TCG { .name = "arm926", .initfn = arm926_initfn }, { .name = "arm946", .initfn = arm946_initfn }, { .name = "arm1026", .initfn = arm1026_initfn }, @@ -2482,6 +2491,7 @@ static const ARMCPUInfo arm_cpus[] = { { .name = "arm1176", .initfn = arm1176_initfn }, { .name = "arm11mpcore", .initfn = arm11mpcore_initfn }, { .name = "cortex-m0", .initfn = cortex_m0_initfn, +#endif .class_init = arm_v7m_class_init }, { .name = "cortex-m3", .initfn = cortex_m3_initfn, .class_init = arm_v7m_class_init }, @@ -2495,6 +2505,7 @@ static const ARMCPUInfo arm_cpus[] = { { .name = "cortex-a8", .initfn = cortex_a8_initfn }, { .name = "cortex-a9", .initfn = cortex_a9_initfn }, { .name = "cortex-a15", .initfn = cortex_a15_initfn }, +#ifdef CONFIG_TCG { .name = "ti925t", .initfn = ti925t_initfn }, { .name = "sa1100", .initfn = sa1100_initfn }, { .name = "sa1110", .initfn = sa1110_initfn }, @@ -2511,6 +2522,7 @@ static const ARMCPUInfo arm_cpus[] = { { .name = "pxa270-b1", .initfn = pxa270b1_initfn }, { .name = "pxa270-c0", .initfn = pxa270c0_initfn }, { .name = "pxa270-c5", .initfn = pxa270c5_initfn }, +#endif #ifndef TARGET_AARCH64 { .name = "max", .initfn = arm_max_initfn }, #endif -- 2.20.1