Fold away all of the cases that now just goto illegal_op,
because all of their internal bits are now in decodetree.
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
---
target/arm/translate.c | 69 ++++++++++--------------------------------
1 file changed, 16 insertions(+), 53 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 836b3752f7..65a74a963b 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -10257,7 +10257,7 @@ static bool trans_PLI(DisasContext *s, arg_PLD *a)
static void disas_arm_insn(DisasContext *s, unsigned int insn)
{
- unsigned int cond, op1;
+ unsigned int cond = insn >> 28;
/* M variants do not implement ARM mode; this must raise the INVSTATE
* UsageFault exception.
@@ -10267,7 +10267,6 @@ static void disas_arm_insn(DisasContext *s, unsigned
int insn)
default_exception_el(s));
return;
}
- cond = insn >> 28;
if (cond == 0xf) {
/* In ARMv3 and v4 the NV condition is UNPREDICTABLE; we
@@ -10332,11 +10331,6 @@ static void disas_arm_insn(DisasContext *s, unsigned
int insn)
goto illegal_op;
}
return;
- } else if ((insn & 0x0fe00000) == 0x0c400000) {
- /* Coprocessor double register transfer. */
- ARCH(5TE);
- } else if ((insn & 0x0f000010) == 0x0e000010) {
- /* Additional coprocessor register transfer. */
}
goto illegal_op;
}
@@ -10348,55 +10342,24 @@ static void disas_arm_insn(DisasContext *s, unsigned
int insn)
}
/* fall back to legacy decoder */
- if ((insn & 0x0f900000) == 0x03000000) {
- /* All done in decodetree. Illegal ops reach here. */
- goto illegal_op;
- } else if ((insn & 0x0f900000) == 0x01000000
- && (insn & 0x00000090) != 0x00000090) {
- /* miscellaneous instructions */
- /* All done in decodetree. Illegal ops reach here. */
- goto illegal_op;
- } else if (((insn & 0x0e000000) == 0 &&
- (insn & 0x00000090) != 0x90) ||
- ((insn & 0x0e000000) == (1 << 25))) {
- /* Data-processing (reg, reg-shift-reg, imm). */
- /* All done in decodetree. Reach here for illegal ops. */
- goto illegal_op;
- } else {
- /* other instructions */
- op1 = (insn >> 24) & 0xf;
- switch(op1) {
- case 0x0:
- case 0x1:
- case 0x4:
- case 0x5:
- case 0x6:
- case 0x7:
- case 0x08:
- case 0x09:
- case 0xa:
- case 0xb:
- case 0xf:
- /* All done in decodetree. Reach here for illegal ops. */
- goto illegal_op;
- case 0xc:
- case 0xd:
- case 0xe:
- if (((insn >> 8) & 0xe) == 10) {
- /* VFP. */
- if (disas_vfp_insn(s, insn)) {
- goto illegal_op;
- }
- } else if (disas_coproc_insn(s, insn)) {
- /* Coprocessor. */
+ switch ((insn >> 24) & 0xf) {
+ case 0xc:
+ case 0xd:
+ case 0xe:
+ if (((insn >> 8) & 0xe) == 10) {
+ /* VFP. */
+ if (disas_vfp_insn(s, insn)) {
goto illegal_op;
}
- break;
- default:
- illegal_op:
- gen_illegal_op(s);
- break;
+ } else if (disas_coproc_insn(s, insn)) {
+ /* Coprocessor. */
+ goto illegal_op;
}
+ break;
+ default:
+ illegal_op:
+ gen_illegal_op(s);
+ break;
}
}
--
2.17.1
