On 9/12/19 8:54 AM, Paul A. Clarke wrote:
> +static void gen_helper_mffscrn(DisasContext *ctx, TCGv_i64 t1)
> +{
> + TCGv_i64 t0 = tcg_temp_new_i64();
> + TCGv_i32 mask = tcg_const_i32(0x0001);
> +
> + gen_reset_fpstatus();
> + tcg_gen_extu_tl_i64(t0, cpu_fpscr);
> + tcg_gen_andi_i64(t0, t0, FP_MODE | FP_ENABLES);Missing the decimal rounding mode (DRN) field at 29:31. Otherwise,
