Hi,
On 10/17/19 12:17 PM, Sai Pavan Boddu wrote:
GQSPI handles chip selects and fifos in a different way compared to
spips. So skip update of cs and fifos related to spips in gqspi mode.
Signed-off-by: Sai Pavan Boddu <sai.pavan.bo...@xilinx.com>
---
Changes for V2:
Just skip update of spips cs and fifos
Update commit message accordingly
hw/ssi/xilinx_spips.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c
index a309c71..27154b0 100644
--- a/hw/ssi/xilinx_spips.c
+++ b/hw/ssi/xilinx_spips.c
@@ -1022,6 +1022,13 @@ static void xilinx_spips_write(void *opaque, hwaddr addr,
}
s->regs[addr] = (s->regs[addr] & ~mask) | (value & mask);
no_reg_update:
+ /* In GQSPI mode skip update of CS and fifo's related to spips */
+ if (object_dynamic_cast(OBJECT(s), TYPE_XLNX_ZYNQMP_QSPIPS)) {
object_dynamic_cast() is expensive, please add a 'bool is_qpspi' in
XilinxQSPIPS and set it in xlnx_zynqmp_qspips_init().
+ XlnxZynqMPQSPIPS *ss = XLNX_ZYNQMP_QSPIPS(s);
+ if (ARRAY_FIELD_EX32(ss->regs, GQSPI_SELECT, GENERIC_QSPI_EN)) {
+ return;
+ }
+ }
xilinx_spips_update_cs_lines(s);
xilinx_spips_check_flush(s);
xilinx_spips_update_cs_lines(s);