From: Richard Henderson <richard.hender...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Message-Id: <20191106113318.10226-4-richard.hender...@linaro.org>
Signed-off-by: Laurent Vivier <laur...@vivier.eu>
---
target/sparc/cpu.h | 33 +++++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index 778aa8e073c7..ae97c7d9f799 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -13,6 +13,39 @@
/*#define EXCP_INTERRUPT 0x100*/
+/* Windowed register indexes. */
+enum {
+ WREG_O0,
+ WREG_O1,
+ WREG_O2,
+ WREG_O3,
+ WREG_O4,
+ WREG_O5,
+ WREG_O6,
+ WREG_O7,
+
+ WREG_L0,
+ WREG_L1,
+ WREG_L2,
+ WREG_L3,
+ WREG_L4,
+ WREG_L5,
+ WREG_L6,
+ WREG_L7,
+
+ WREG_I0,
+ WREG_I1,
+ WREG_I2,
+ WREG_I3,
+ WREG_I4,
+ WREG_I5,
+ WREG_I6,
+ WREG_I7,
+
+ WREG_SP = WREG_O6,
+ WREG_FP = WREG_I6,
+};
+
/* trap definitions */
#ifndef TARGET_SPARC64
#define TT_TFAULT 0x01
--
2.21.0
