On Thu, 14 Nov 2019 at 22:27, Keith Packard <kei...@keithp.com> wrote: > > Richard Henderson <richard.hender...@linaro.org> writes: > > > For semi-hosting, it seems even better if the semi-hosting syscall > > instruction > > is not "real", because you're explicitly requesting services from "unreal" > > hardware. It should be specified to generate a SIGILL type of exception > > anywhere semi-hosting is not enabled. > > In the QEMU case, yes, it's virtual hardware. However, the other common case > for semihosting is when doing hardware bringup using JTAG or other > remote debugging link -- having an instruction which safely traps to the > debugger is required to make semihosting usable there. Reading through > the history of the current RISC-V semihosting mechanism, there were many > designs considered and rejected because they wouldn't work in the JTAG > environment. > > > With that in mind, it may be simpler to handle all of this not in the > > translator, but in the function that delivers the ebreak exception. At that > > point one can arrange to read memory without raising additional > > exceptions. > > I'll go explore and see if I can figure any of this out. > > I'd still like to get the non-RISC-V SYS_READC patch landed someday :-)
It's on my queue to review if nobody else gets to it first, but since we're in freeze right now it won't be landing til after the release happens (expected mid-December). thanks -- PMM
