On Tuesday, October 29, 2019, Michael Rolnik <mrol...@gmail.com> wrote:
> Signed-off-by: Michael Rolnik <mrol...@gmail.com>
> ---
> MAINTAINERS | 9 +++++++++
> arch_init.c | 2 ++
> configure | 7 +++++++
> default-configs/avr-softmmu.mak | 5 +++++
> include/disas/dis-asm.h | 6 ++++++
> include/sysemu/arch_init.h | 1 +
> qapi/machine.json | 3 ++-
> target/avr/Makefile.objs | 33 +++++++++++++++++++++++++++++++++
> tests/machine-none-test.c | 1 +
> 9 files changed, 66 insertions(+), 1 deletion(-)
> create mode 100644 default-configs/avr-softmmu.mak
> create mode 100644 target/avr/Makefile.objs
>
>
Michael, hi.
Can you please do the following:
1. replace "4.2" with "5.0", as Eric hinted
2. divide this patch into three patches:
- target/avr: Register AVR support with the rest of QEMU
- target/avr: Update build system
- target/avr: Update MAINTAINERS file
(distribution of files to patches is obvious)
3. Add at least a sentence to the commit messages of three new patches
4. Don't forget to add Philippe's "Tested-by:"s to all three commit messages
5. At this stage you can add:
Reviewed-by: Aleksandar Markovic <amarko...@wavecomp.com>
to all three new patches.
6. Rearange last patches in your series so that their order look like this:
(prior to this you need to do split of the patch 13/13 as I described in my
response to it, half an hour ago)
- target/avr: Register AVR support with the rest of QEMU
- target/avr: Update build system
- target/avr: Add boot serial test
- target/avr: Add Avocado acceptance test
- target/avr: Update MAINTAINERS file
That way, the "MAINTAINERS" patch acts as some kind of signature. :-)
...........................
You may think that these are all unnecessary details, but, trust me, they
give a lot of quality and gravity to the series.
Yours, Aleksandar
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 5b27888533..01f951356f 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -163,6 +163,15 @@ S: Maintained
> F: hw/arm/smmu*
> F: include/hw/arm/smmu*
>
> +AVR TCG CPUs
> +M: Michael Rolnik <mrol...@gmail.com>
> +S: Maintained
> +F: target/avr/
> +F: hw/misc/avr_mask.c
> +F: hw/char/avr_usart.c
> +F: hw/timer/avr_timer16.c
> +F: hw/avr/
> +
> CRIS TCG CPUs
> M: Edgar E. Iglesias <edgar.igles...@gmail.com>
> S: Maintained
> diff --git a/arch_init.c b/arch_init.c
> index 705d0b94ad..6a741165b2 100644
> --- a/arch_init.c
> +++ b/arch_init.c
> @@ -89,6 +89,8 @@ int graphic_depth = 32;
> #define QEMU_ARCH QEMU_ARCH_UNICORE32
> #elif defined(TARGET_XTENSA)
> #define QEMU_ARCH QEMU_ARCH_XTENSA
> +#elif defined(TARGET_AVR)
> +#define QEMU_ARCH QEMU_ARCH_AVR
> #endif
>
> const uint32_t arch_type = QEMU_ARCH;
> diff --git a/configure b/configure
> index 3be9e92a24..e5dec62fde 100755
> --- a/configure
> +++ b/configure
> @@ -7516,6 +7516,10 @@ case "$target_name" in
> mttcg="yes"
> gdb_xml_files="aarch64-core.xml aarch64-fpu.xml arm-core.xml
> arm-vfp.xml arm-vfp3.xml arm-neon.xml"
> ;;
> + avr)
> + gdb_xml_files="avr-cpu.xml"
> + target_compiler=$cross_cc_avr
> + ;;
> cris)
> ;;
> hppa)
> @@ -7735,6 +7739,9 @@ for i in $ARCH $TARGET_BASE_ARCH ; do
> disas_config "ARM_A64"
> fi
> ;;
> + avr)
> + disas_config "AVR"
> + ;;
> cris)
> disas_config "CRIS"
> ;;
> diff --git a/default-configs/avr-softmmu.mak
> b/default-configs/avr-softmmu.mak
> new file mode 100644
> index 0000000000..d1e1c28118
> --- /dev/null
> +++ b/default-configs/avr-softmmu.mak
> @@ -0,0 +1,5 @@
> +# Default configuration for avr-softmmu
> +
> +# Boards:
> +#
> +CONFIG_AVR_SAMPLE=y
> diff --git a/include/disas/dis-asm.h b/include/disas/dis-asm.h
> index e9c7dd8eb4..8bedce17ac 100644
> --- a/include/disas/dis-asm.h
> +++ b/include/disas/dis-asm.h
> @@ -211,6 +211,12 @@ enum bfd_architecture
> #define bfd_mach_m32r 0 /* backwards compatibility */
> bfd_arch_mn10200, /* Matsushita MN10200 */
> bfd_arch_mn10300, /* Matsushita MN10300 */
> + bfd_arch_avr, /* Atmel AVR microcontrollers. */
> +#define bfd_mach_avr1 1
> +#define bfd_mach_avr2 2
> +#define bfd_mach_avr3 3
> +#define bfd_mach_avr4 4
> +#define bfd_mach_avr5 5
> bfd_arch_cris, /* Axis CRIS */
> #define bfd_mach_cris_v0_v10 255
> #define bfd_mach_cris_v32 32
> diff --git a/include/sysemu/arch_init.h b/include/sysemu/arch_init.h
> index 62c6fe4cf1..893df26ce2 100644
> --- a/include/sysemu/arch_init.h
> +++ b/include/sysemu/arch_init.h
> @@ -24,6 +24,7 @@ enum {
> QEMU_ARCH_NIOS2 = (1 << 17),
> QEMU_ARCH_HPPA = (1 << 18),
> QEMU_ARCH_RISCV = (1 << 19),
> + QEMU_ARCH_AVR = (1 << 20),
> };
>
> extern const uint32_t arch_type;
> diff --git a/qapi/machine.json b/qapi/machine.json
> index ca26779f1a..1fa2917ba9 100644
> --- a/qapi/machine.json
> +++ b/qapi/machine.json
> @@ -21,11 +21,12 @@
> # is true even for "qemu-system-x86_64".
> #
> # ppcemb: dropped in 3.1
> +# avr: since 4.2
> #
> # Since: 3.0
> ##
> { 'enum' : 'SysEmuTarget',
> - 'data' : [ 'aarch64', 'alpha', 'arm', 'cris', 'hppa', 'i386', 'lm32',
> + 'data' : [ 'aarch64', 'alpha', 'arm', 'avr', 'cris', 'hppa', 'i386',
> 'lm32',
> 'm68k', 'microblaze', 'microblazeel', 'mips', 'mips64',
> 'mips64el', 'mipsel', 'moxie', 'nios2', 'or1k', 'ppc',
> 'ppc64', 'riscv32', 'riscv64', 's390x', 'sh4',
> diff --git a/target/avr/Makefile.objs b/target/avr/Makefile.objs
> new file mode 100644
> index 0000000000..2976affd95
> --- /dev/null
> +++ b/target/avr/Makefile.objs
> @@ -0,0 +1,33 @@
> +#
> +# QEMU AVR CPU
> +#
> +# Copyright (c) 2019 Michael Rolnik
> +#
> +# This library is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU Lesser General Public
> +# License as published by the Free Software Foundation; either
> +# version 2.1 of the License, or (at your option) any later version.
> +#
> +# This library is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> +# Lesser General Public License for more details.
> +#
> +# You should have received a copy of the GNU Lesser General Public
> +# License along with this library; if not, see
> +# <http://www.gnu.org/licenses/lgpl-2.1.html>
> +#
> +
> +DECODETREE = $(SRC_PATH)/scripts/decodetree.py
> +decode-y = $(SRC_PATH)/target/avr/insn.decode
> +
> +target/avr/decode_insn.inc.c: $(decode-y) $(DECODETREE)
> + $(call quiet-command, \
> + $(PYTHON) $(DECODETREE) -o $@ --decode decode_insn --insnwidth
> 16 $<, \
> + "GEN", $(TARGET_DIR)$@)
> +
> +target/avr/translate.o: target/avr/decode_insn.inc.c
> +
> +obj-y += translate.o cpu.o helper.o
> +obj-y += gdbstub.o
> +obj-$(CONFIG_SOFTMMU) += machine.o
> diff --git a/tests/machine-none-test.c b/tests/machine-none-test.c
> index 5953d31755..3e5c74e73e 100644
> --- a/tests/machine-none-test.c
> +++ b/tests/machine-none-test.c
> @@ -27,6 +27,7 @@ static struct arch2cpu cpus_map[] = {
> /* tested targets list */
> { "arm", "cortex-a15" },
> { "aarch64", "cortex-a57" },
> + { "avr", "avr6-avr-cpu" },
> { "x86_64", "qemu64,apic-id=0" },
> { "i386", "qemu32,apic-id=0" },
> { "alpha", "ev67" },
> --
> 2.17.2 (Apple Git-113)
>
>
