On Tue, 26 Nov 2019 at 14:12, Peter Maydell <peter.mayd...@linaro.org> wrote: > > Arm patches for rc3 : just a handful of bug fixes. > > thanks > -- PMM > > > The following changes since commit 4ecc984210ca1bf508a96a550ec8a93a5f833f6c: > > Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-4.2-rc3' > into staging (2019-11-26 12:36:40 +0000) > > are available in the Git repository at: > > https://git.linaro.org/people/pmaydell/qemu-arm.git > tags/pull-target-arm-20191126 > > for you to fetch changes up to 6a4ef4e5d1084ce41fafa7d470a644b0fd3d9317: > > target/arm: Honor HCR_EL2.TID3 trapping requirements (2019-11-26 13:55:37 > +0000) > > ---------------------------------------------------------------- > target-arm queue: > * handle FTYPE flag correctly in v7M exception return > for v7M CPUs with an FPU (v8M CPUs were already correct) > * versal: Add the CRP as unimplemented > * Fix ISR_EL1 tracking when executing at EL2 > * Honor HCR_EL2.TID3 trapping requirements >
Applied, thanks. Please update the changelog at https://wiki.qemu.org/ChangeLog/4.2 for any user-visible changes. -- PMM