Hello Eric, On 05/12/2019 09:42, Auger Eric wrote: > Not related to this patch but I noticed SMMU_BASE_ADDR_MASK should be > 0xffffffffffc0 and not 0xffffffffffe0. I can fix it separately or if you > respin, you may fix it as well?
Good catch, thank you. I'll fix it in the next version. Looking at the upper end of that mask, it seems that we are currently masking out bits 48 through 63, rather than just 51 through 63. The reference manual says that this should be done to match the system physical address size as given by SMMU_IDR5.OAS. We define SMMU_IDR5_OAS to be 4, which selects a physical address size of 44 bits (ref. section 6.3.6). I think the mask should therefore be 0xfffffffffc0 to clear bits 44 and above. Do you agree? Ideally, we would derive this mask from our definition of SMMU_IDR5_OAS, but I'm not sure it's okay to stuff a call to oas2bits() into the SMMU_BASE_ADDR_MASK macro. Regards Simon Amazon Development Center Germany GmbH Krausenstr. 38 10117 Berlin Geschaeftsfuehrung: Christian Schlaeger, Ralf Herbrich Eingetragen am Amtsgericht Charlottenburg unter HRB 149173 B Sitz: Berlin Ust-ID: DE 289 237 879