On Mon, Dec 9, 2019 at 11:15 PM <pannengy...@huawei.com> wrote: > > From: Pan Nengyuan <pannengy...@huawei.com> > > Fix a minor memory leak in riscv_sifive_u_soc_realize() > > Reported-by: Euler Robot <euler.ro...@huawei.com> > Signed-off-by: Pan Nengyuan <pannengy...@huawei.com>
Reviewed-by: Alistair Francis <alistair.fran...@wdc.com> Alistair > --- > hw/riscv/sifive_u.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c > index 0140e95..0e12b3c 100644 > --- a/hw/riscv/sifive_u.c > +++ b/hw/riscv/sifive_u.c > @@ -542,6 +542,7 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, > Error **errp) > SIFIVE_U_PLIC_CONTEXT_BASE, > SIFIVE_U_PLIC_CONTEXT_STRIDE, > memmap[SIFIVE_U_PLIC].size); > + g_free(plic_hart_config); > sifive_uart_create(system_memory, memmap[SIFIVE_U_UART0].base, > serial_hd(0), qdev_get_gpio_in(DEVICE(s->plic), SIFIVE_U_UART0_IRQ)); > sifive_uart_create(system_memory, memmap[SIFIVE_U_UART1].base, > -- > 2.7.2.windows.1 > > >
