If the chip used QEMU's algorithm it would need an extra word-sized register just to recheck the EOL bit, which would be a waste of silicon. Do it the way the chip would do it. No functional change.
Signed-off-by: Finn Thain <fth...@telegraphics.com.au> --- hw/net/dp8393x.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c index 49d7d9769e..494deb42bf 100644 --- a/hw/net/dp8393x.c +++ b/hw/net/dp8393x.c @@ -768,7 +768,8 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf, address = dp8393x_crda(s) + sizeof(uint16_t) * 5 * width; address_space_rw(&s->as, address, MEMTXATTRS_UNSPECIFIED, (uint8_t *)s->data, size, 0); - if (dp8393x_get(s, width, 0) & 0x1) { + s->regs[SONIC_LLFA] = dp8393x_get(s, width, 0); + if (s->regs[SONIC_LLFA] & 0x1) { /* Still EOL ; stop reception */ return -1; } -- 2.23.0