On 8 June 2011 01:32, Rob Landley <r...@landley.net> wrote: > QEMU's -cpu arm1136 emulation stopped working in the 2.6.35 and later > kernels, now QEMU dies early in the kernel boot with: > > qemu: fatal: Unimplemented cp15 register write (c13, c0, {0, 3})
> The CPUID for arm1136 QEMU emulates a process that should have hardware > TLS (target-arm/cpu.h): > > #define ARM_CPUID_ARM1136 0x4117b363 > > Meaning the above "switch it off" test doesn't trigger, the kernel tries > to access a hardware feature QEMU doesn't emulate, and QEMU aborts. > > Note: I can work around this with -cpu arm1136-r2 (0x4107b363), The QEMU bug here is that we provide the TLS cp15 registers only if ARM_FEATURE_V6K, which is almost right except that they are also available on the ARM1136 r1p0 and above. (I note in passing that the QEMU CPU name "arm1136-r2" is rather misleading because in fact it's providing an r0p2. The only difference to "arm1136" in the QEMU model currently is the CPUID register value.) 1136r1p0 and above are a kind of halfway-house between v6 and v6K: they have TLS regs, CLREX, load-store-exclusive for non-word sizes and the NOP instruction, but are missing the v6K VA-PA translation, SEV, WFE, WFI and YIELD. I guess we need some more finegrained feature switches here (also I think some actual code which implements "V7 implies V6K, V6, V5, V4T" and so on rather than having each CPU set them all by hand). > (Is there a data sheet somewhere...?) CPU-specific manuals (TRMs) are available from http://infocenter.arm.com/ The architecture reference manual is also available if you register as a user on the website, which I'm told is a fairly hassle-free process. -- PMM