On Friday, January 31, 2020, Aleksandar Markovic < aleksandar.marko...@rt-rk.com> wrote:
> From: Michael Rolnik <mrol...@gmail.com> > > This includes definitions of various basic parameters needed > for integration of a new platform into QEMU. > > [AM: Split a larger AVR introduction patch into logical units] > Suggested-by: Aleksandar Markovic <aleksandar.m.m...@gmail.com> > > Co-developed-by: Michael Rolnik <mrol...@gmail.com> > Co-developed-by: Sarah Harris <s.e.har...@kent.ac.uk> > Signed-off-by: Michael Rolnik <mrol...@gmail.com> > Signed-off-by: Sarah Harris <s.e.har...@kent.ac.uk> > Signed-off-by: Michael Rolnik <mrol...@gmail.com> > Acked-by: Igor Mammedov <imamm...@redhat.com> > Tested-by: Philippe Mathieu-Daudé <phi...@redhat.com> > Signed-off-by: Richard Henderson <richard.hender...@linaro.org> > Signed-off-by: Aleksandar Markovic <aleksandar.m.m...@gmail.com> > --- > target/avr/cpu-param.h | 37 ++++++++++++++++++++++++++ > target/avr/cpu.h | 72 ++++++++++++++++++++++++++++++ > ++++++++++++++++++++ > 2 files changed, 109 insertions(+) > create mode 100644 target/avr/cpu-param.h > create mode 100644 target/avr/cpu.h > > diff --git a/target/avr/cpu-param.h b/target/avr/cpu-param.h > new file mode 100644 > index 0000000..0c29ce4 > --- /dev/null > +++ b/target/avr/cpu-param.h > @@ -0,0 +1,37 @@ > +/* > + * QEMU AVR CPU > + * > + * Copyright (c) 2019 Michael Rolnik > + * > + * This library is free software; you can redistribute it and/or > + * modify it under the terms of the GNU Lesser General Public > + * License as published by the Free Software Foundation; either > + * version 2.1 of the License, or (at your option) any later version. > + * > + * This library is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU > + * Lesser General Public License for more details. > + * > + * You should have received a copy of the GNU Lesser General Public > + * License along with this library; if not, see > + * <http://www.gnu.org/licenses/lgpl-2.1.html> > + */ > + > +#ifndef AVR_CPU_PARAM_H > +#define AVR_CPU_PARAM_H > + > +#define TARGET_LONG_BITS 32 > +/* > + * TARGET_PAGE_BITS cannot be more than 8 bits because > + * 1. all IO registers occupy [0x0000 .. 0x00ff] address range, and they > + * should be implemented as a device and not memory > + * 2. SRAM starts at the address 0x0100 > + */ > +#define TARGET_PAGE_BITS 8 > +#define TARGET_PHYS_ADDR_SPACE_BITS 24 > +#define TARGET_VIRT_ADDR_SPACE_BITS 24 > +#define NB_MMU_MODES 2 > + > + > +#endif > diff --git a/target/avr/cpu.h b/target/avr/cpu.h > new file mode 100644 > index 0000000..d122611 > --- /dev/null > +++ b/target/avr/cpu.h > @@ -0,0 +1,72 @@ > +/* > + * QEMU AVR CPU > + * > + * Copyright (c) 2019 Michael Rolnik > + * > + * This library is free software; you can redistribute it and/or > + * modify it under the terms of the GNU Lesser General Public > + * License as published by the Free Software Foundation; either > + * version 2.1 of the License, or (at your option) any later version. > + * > + * This library is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU > + * Lesser General Public License for more details. > + * > + * You should have received a copy of the GNU Lesser General Public > + * License along with this library; if not, see > + * <http://www.gnu.org/licenses/lgpl-2.1.html> > + */ > + > +#ifndef QEMU_AVR_CPU_H > +#define QEMU_AVR_CPU_H > + > +#include "cpu-qom.h" > +#include "exec/cpu-defs.h" > + > +#define TCG_GUEST_DEFAULT_MO 0 > +#define AVR_CPU_TYPE_SUFFIX "-" TYPE_AVR_CPU > +#define AVR_CPU_TYPE_NAME(name) (name AVR_CPU_TYPE_SUFFIX) > +#define CPU_RESOLVING_TYPE TYPE_AVR_CPU > + > +/* > + * AVR has two memory spaces, data & code. > + * e.g. both have 0 address > + * ST/LD instructions access data space > + * LPM/SPM and instruction fetching access code memory space > + */ > +#define MMU_CODE_IDX 0 > +#define MMU_DATA_IDX 1 > + > +#define EXCP_RESET 1 > +#define EXCP_INT(n) (EXCP_RESET + (n) + 1) > + > +/* Number of CPU registers */ > +#define NUMBER_OF_CPU_REGISTERS 32 > +/* Number of IO registers accessible by ld/st/in/out */ > +#define NUMBER_OF_IO_REGISTERS 64 > + > +/* > + * Offsets of AVR memory regions in host memory space. > + * > + * This is needed because the AVR has separate code and data address > + * spaces that both have start from zero but have to go somewhere in > + * host memory. > + * > + * It's also useful to know where some things are, like the IO registers. > + */ > +/* Flash program memory */ > +#define OFFSET_CODE 0x00000000 > +/* CPU registers, IO registers, and SRAM */ > +#define OFFSET_DATA 0x00800000 > +/* CPU registers specifically, these are mapped at the start of data */ > +#define OFFSET_CPU_REGISTERS OFFSET_DATA > +/* > + * IO registers, including status register, stack pointer, and memory > + * mapped peripherals, mapped just after CPU registers > + */ > +#define OFFSET_IO_REGISTERS (OFFSET_DATA + NUMBER_OF_CPU_REGISTERS) > + > +#define EF_AVR_MACH 0x7F This line seems to belong more to patch 6, where it basically extracts bits 6..0 from e_flags. + > +#endif /* !defined (QEMU_AVR_CPU_H) */ > -- > 2.7.4 > >
