On 2/10/20 8:12 AM, LIU Zhiwei wrote: > The 32 vector registers will be viewed as a continuous memory block. > It avoids the convension between element index and (regno,offset). > Thus elements can be directly accessed by offset from the first vector > base address. > > Signed-off-by: LIU Zhiwei <zhiwei_...@c-sky.com> > --- > target/riscv/cpu.h | 13 +++++++++++++ > 1 file changed, 13 insertions(+)
Reviewed-by: Richard Henderson <richard.hender...@linaro.org> I still don't think you need to put stuff into a sub-structure. These register names are unique in the manual, and not subdivided there. r~
