On 2/12/2020 5:00 PM, Igor Mammedov wrote:
On Wed, 12 Feb 2020 16:13:28 +0800
Tao Xu <tao3...@intel.com> wrote:

Add which features are added or removed in this version. Remove the
changed model-id in versioned CPU models, to keep the model name
unchanged at /proc/cpuinfo inside the VM.

Signed-off-by: Tao Xu <tao3...@intel.com>
---

Changes in v2:
     - correct the note of Cascadelake v3 (Xiaoyao)
---
  target/i386/cpu.c | 54 ++++++++++++++++++++++-------------------------
  1 file changed, 25 insertions(+), 29 deletions(-)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 81a039beb6..739ef4ce91 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
[...]
@@ -3142,6 +3130,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
          .versions = (X86CPUVersionDefinition[]) {
              { .version = 1 },
              { .version = 2,
+              .note = "ARCH_CAPABILITIES",

what's ARCH_CAPABILITIES?


These are some features exposed by MSR_IA32_ARCH_CAPABILITIES. For Cascadelake, these are "rdctl-no" "ibrs-all" "skip-l1dfl-vmentry" "mds-no"

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