On Fri, 21 Feb 2020 at 07:46, Sai Pavan Boddu
<sai.pavan.bo...@xilinx.com> wrote:
>
> ARM11MPCore GIC is implemented with 4 priority bits.
>
> Signed-off-by: Sai Pavan Boddu <sai.pavan.bo...@xilinx.com>
> Suggested-by: Peter Maydell <peter.mayd...@linaro.org>
> ---
> hw/cpu/arm11mpcore.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/hw/cpu/arm11mpcore.c b/hw/cpu/arm11mpcore.c
> index 2e3e87c..ab9fadb 100644
> --- a/hw/cpu/arm11mpcore.c
> +++ b/hw/cpu/arm11mpcore.c
> @@ -15,6 +15,7 @@
> #include "hw/irq.h"
> #include "hw/qdev-properties.h"
>
> +#define ARM11MPCORE_NUM_GIC_PRIORITY_BITS 4
>
> static void mpcore_priv_set_irq(void *opaque, int irq, int level)
> {
> @@ -86,6 +87,10 @@ static void mpcore_priv_realize(DeviceState *dev, Error
> **errp)
>
> qdev_prop_set_uint32(gicdev, "num-cpu", s->num_cpu);
> qdev_prop_set_uint32(gicdev, "num-irq", s->num_irq);
> + qdev_prop_set_uint32(gicdev, "num-priority-bits",
> + ARM11MPCORE_NUM_GIC_PRIORITY_BITS);
> +
> +
> object_property_set_bool(OBJECT(&s->gic), true, "realized", &err);
> if (err != NULL) {
> error_propagate(errp, err);
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
thanks
-- PMM
