On Tue, Feb 25, 2020 at 09:50:26AM +0800, Yubo Miao wrote: > From: miaoyubo <miaoy...@huawei.com> > > Currently, pxb-pcie could be defined by the cmdline like > --device pxb-pcie,id=pci.9,bus_nr=128 > However pxb-pcie is not described in acpi tables for arm. > > The formal two patches support pxb-pcie for arm, escpcially the > specification for pxb-pcie in DSDT table.
especially? Pls spell-check comments and commit log, it's not hard to do. > Add a testcase to make sure the ACPI table is correct for guest. > > The following table need to be added for this test: > tests/data/acpi/virt/DSDT.pxb > Since the ASL diff has 1000+ lines, it would be presented in > commit log with the simply diff. the diff are: > Device (PC80) is presented in DSDT. > Resources allocated for Device (PCI0) is changed. > > * Disassembling to symbolic ASL+ operators > * > - * Disassembly of /home/DSDT, Mon Feb 24 19:35:28 2020 > + * Disassembly of /home/DSDT.pxb, Mon Feb 24 19:33:38 2020 > * > * Original Table Header: > * Signature "DSDT" > - * Length 0x000014BB (5307) > + * Length 0x00001F70 (8048) > * Revision 0x02 > - * Checksum 0xD1 > + * Checksum 0xCF > * OEM ID "BOCHS " > * OEM Table ID "BXPCDSDT" > * OEM Revision 0x00000001 (1) > }) > } > > + Device (PC80) > + { > + Name (_HID, "PNP0A08" /* PCI Express Bus */) // _HID: Hardware > ID > + Name (_CID, "PNP0A03" /* PCI Bus */) // _CID: Compatible ID > + Name (_ADR, Zero) // _ADR: Address > + Name (_CCA, One) // _CCA: Cache Coherency Attribute > + Name (_SEG, Zero) // _SEG: PCI Segment > + Name (_BBN, 0x80) // _BBN: BIOS Bus Number > + Name (_UID, 0x80) // _UID: Unique ID > + Name (_STR, Unicode ("pxb Device")) // _STR: Description String > + Name (_PRT, Package (0x80) // _PRT: PCI Routing Table > + { > + Package (0x04) > + { > + 0xFFFF, > + Zero, > + GSI0, > + Zero > + }, > > Packages are omitted. > > + > + Package (0x04) > + { > + 0x001FFFFF, > + 0x03, > + GSI2, > + Zero > + } > + }) > + Device (GSI0) > + { > + Name (_HID, "PNP0C0F" /* PCI Interrupt Link Device */) // > _HID: Hardware ID > + Name (_UID, Zero) // _UID: Unique ID > + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource > Settings > + { > + Interrupt (ResourceConsumer, Level, ActiveHigh, > Exclusive, ,, ) > + { > + 0x00000023, > + } > + }) > + Name (_CRS, ResourceTemplate () // _CRS: Current Resource > Settings > + { > + Interrupt (ResourceConsumer, Level, ActiveHigh, > Exclusive, ,, ) > + { > + 0x00000023, > + } > + }) > + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource > Settings > + { > + } > + } > + > > GSI1,2,3 are omitted. > > + Method (_CBA, 0, NotSerialized) // _CBA: Configuration Base > Address > + { > + Return (0x0000004010000000) > + } > + > + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource > Settings > + { > + Name (RBUF, ResourceTemplate () > + { > + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, > PosDecode, > + 0x0000, // Granularity > + 0x0080, // Range Minimum > + 0x0081, // Range Maximum > + 0x0000, // Translation Offset > + 0x0002, // Length > + ,, ) > + DWordMemory (ResourceProducer, PosDecode, MinFixed, > MaxFixed, NonCacheable, ReadWrite, > + 0x00000000, // Granularity > + 0x3E9F0000, // Range Minimum > + 0x3EFEFFFF, // Range Maximum > + 0x00000000, // Translation Offset > + 0x00600000, // Length > + ,, , AddressRangeMemory, TypeStatic) > + DWordIO (ResourceProducer, MinFixed, MaxFixed, > PosDecode, EntireRange, > + 0x00000000, // Granularity > + 0x0000C000, // Range Minimum > + 0x0000FFFF, // Range Maximum > + 0x3EFF0000, // Translation Offset > + 0x00004000, // Length > + ,, , TypeStatic, DenseTranslation) > + QWordMemory (ResourceProducer, PosDecode, MinFixed, > MaxFixed, NonCacheable, ReadWrite, > + 0x0000000000000000, // Granularity > + 0x000000FFFFA00000, // Range Minimum > + 0x000000FFFFFFFFFF, // Range Maximum > + 0x0000000000000000, // Translation Offset > + 0x0000000000600000, // Length > + ,, , AddressRangeMemory, TypeStatic) > + }) > + Return (ResourceTemplate () > + { > + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, > PosDecode, > + 0x0000, // Granularity > + 0x0080, // Range Minimum > + 0x0081, // Range Maximum > + 0x0000, // Translation Offset > + 0x0002, // Length > + ,, ) > + DWordMemory (ResourceProducer, PosDecode, MinFixed, > MaxFixed, NonCacheable, ReadWrite, > + 0x00000000, // Granularity > + 0x3E9F0000, // Range Minimum > + 0x3EFEFFFF, // Range Maximum > + 0x00000000, // Translation Offset > + 0x00600000, // Length > + ,, , AddressRangeMemory, TypeStatic) > + DWordIO (ResourceProducer, MinFixed, MaxFixed, > PosDecode, EntireRange, > + 0x00000000, // Granularity > + 0x0000C000, // Range Minimum > + 0x0000FFFF, // Range Maximum > + 0x3EFF0000, // Translation Offset > + 0x00004000, // Length > + ,, , TypeStatic, DenseTranslation) > + QWordMemory (ResourceProducer, PosDecode, MinFixed, > MaxFixed, NonCacheable, ReadWrite, > + 0x0000000000000000, // Granularity > + 0x000000FFFFA00000, // Range Minimum > + 0x000000FFFFFFFFFF, // Range Maximum > + 0x0000000000000000, // Translation Offset > + 0x0000000000600000, // Length > + ,, , AddressRangeMemory, TypeStatic) > + }) > + } > + > + Name (SUPP, Zero) > + Name (CTRL, Zero) > + Method (_OSC, 4, NotSerialized) // _OSC: Operating System > Capabilities > + { > + CreateDWordField (Arg3, Zero, CDW1) > + If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") > /* PCI Host Bridge Device */)) > + { > + CreateDWordField (Arg3, 0x04, CDW2) > + CreateDWordField (Arg3, 0x08, CDW3) > + SUPP = CDW2 /* \_SB_.PC80._OSC.CDW2 */ > + CTRL = CDW3 /* \_SB_.PC80._OSC.CDW3 */ > + CTRL &= 0x1F > + If ((Arg1 != One)) > + { > + CDW1 |= 0x08 > + } > + > + If ((CDW3 != CTRL)) > + { > + CDW1 |= 0x10 > + } > + > + CDW3 = CTRL /* \_SB_.PC80.CTRL */ > + Return (Arg3) > + } > + Else > + { > + CDW1 |= 0x04 > + Return (Arg3) > + } > + } > + > + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method > + { > + If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") > /* Device Labeling Interface */)) > + { > + If ((Arg2 == Zero)) > + { > + Return (Buffer (One) > + { > + 0x01 > // . > + }) > + } > + } > + > + Return (Buffer (One) > + { > + 0x00 // . > + }) > + } > + } > + > Device (PCI0) > { > Name (_HID, "PNP0A08" /* PCI Express Bus */) // _HID: Hardware > ID > WordBusNumber (ResourceProducer, MinFixed, MaxFixed, > PosDecode, > 0x0000, // Granularity > 0x0000, // Range Minimum > - 0x00FF, // Range Maximum > + 0x007F, // Range Maximum > 0x0000, // Translation Offset > - 0x0100, // Length > + 0x0080, // Length > ,, ) > DWordMemory (ResourceProducer, PosDecode, MinFixed, > MaxFixed, NonCacheable, ReadWrite, > 0x00000000, // Granularity > 0x10000000, // Range Minimum > - 0x3EFEFFFF, // Range Maximum > + 0x3E9EFFFF, // Range Maximum > 0x00000000, // Translation Offset > - 0x2EFF0000, // Length > + 0x2E9F0000, // Length > ,, , AddressRangeMemory, TypeStatic) > DWordIO (ResourceProducer, MinFixed, MaxFixed, > PosDecode, EntireRange, > 0x00000000, // Granularity > 0x00000000, // Range Minimum > - 0x0000FFFF, // Range Maximum > + 0x0000BFFF, // Range Maximum > 0x3EFF0000, // Translation Offset > - 0x00010000, // Length > + 0x0000C000, // Length > ,, , TypeStatic, DenseTranslation) > QWordMemory (ResourceProducer, PosDecode, MinFixed, > MaxFixed, NonCacheable, ReadWrite, > 0x0000000000000000, // Granularity > > Signed-off-by: miaoyubo <miaoy...@huawei.com> Seems to fail in patchew. > --- > tests/data/acpi/virt/DSDT.pxb | Bin 0 -> 8048 bytes > tests/qtest/bios-tables-test-allowed-diff.h | 1 + > tests/qtest/bios-tables-test.c | 54 +++++++++++++++++--- > 3 files changed, 49 insertions(+), 6 deletions(-) > create mode 100644 tests/data/acpi/virt/DSDT.pxb This needs to be in a separate patch. See instructions in ./tests/qtest/bios-tables-test.c. > new file mode 100644 > index > 0000000000000000000000000000000000000000..6ac0b5212db49513c27ef50da838240826c2deb7 > GIT binary patch > literal 8048 > zcmeI1%WoT16o;=JC$Yzm*opISUQVG@JS#t%CM|7<J+_mSI5D22K}sb@AP^;+NK}YY > zA<`@glogG{k_IUYB>o60v0?=~7OdH@Mq<bCyK`rfbJDY8frM<S_MDk}zPX=!9sg!r > zb7~uVd8NWXSJ&-jXQujQ%dTNxNGYYa^=taeKSQ@VPPMarFm4wLg=lAarIxJNtrZk= > zD%#mxsj2OQtM+;`IM!}17YfCqe=ORu+fHWO8hsE`8W>Y)rM~D>q0l*0chOsHtU7-0 > z>RNjpy|b)0W2O9FG^j|>QZ!THEg^Hd)0RlkGT+#;8>Z!rdUF%AFX1fCM#YMw$F7|1 > z49CX&`Bfq}+kv<_TY*gQr1MnKQej`QKoM-h0YablDMVPEB8onus%KH6&H=&-ON<C% > zlqjPtGI}INA7PX!<C4gTNQ@|9T%wFwk<lwLEW((jjLRaUPhunp<1%H;iHv@Uks^#a > z%9s}!QHhZzjCsnqA~IqUV~{Ye5Jr)Gj84{vB{8yuag{Q}Wy(J!!BQU~j8`c`UZ)9Z > z9%F=YjWXnQnv@vhgmIlR<aL^o7?XstKpFBn9grB)gz*|>$m=vMF=hy3kuv0UnvodK > z5JrVE<aIhIG0qc4l``aYIwUbJ5Qa?{C3&4@CC2lFQKJlboeoQk7YU<I8S*+Ekr*!% > zMuRfsbvi0BE)vEPWytGvOkxxWW0^AKb()hHCBj&t40)Z7ON>i|af34Cbvhw2E)&M< > zlp(LvNr^E}7^{>auhS`sag{Kdgi)5)>9oYSMi^_9A+OWC#8@DVb)R8>-?HcZd9>DA > zg-T%_xy42ZGgTQ?rPkK_yd2@wm#|%}u37tDIMXlAMmv+UM)uT4>Mb>+YU&;Jp}MW! > z#;d~MR(oS;^#f~vFdm7!u3B<d3d(GUuw7Jx3BBJ6qbLPM4~nuHOhyu}i&$sI`IYX% > zz?3=W^<ijG>Q3;zvB*hgtY7KQU?@V6J|l*DohWrDX5)?R@j8PU^eEjK4DB(U80vMR > z)SZ}-*NH@E#`=}-=nX|^@-2gsdiFBUUhkZNXRqlDCXbSO_AyU{U(6sFijYM;QBu!- > z=Go6Y`?)7d>KSF8QLi(2OAyMaCrauWW1fiZ=H2t&k{I_yNj)v*X)#ZPIO>U#dd8V& > zoO#B%Crav>V4ex)iO@$qQBuz&^Gq_&B=<x~JyXmx#XJ!bsV7S6Ilw#znCAfZL`gky > z*+kZDnt38rQcslBGs8SH%rnD1QBu!A<~hhb5kjdaO6obpJcpR)5cfn$J+sU+%RCWU > zsV7S6Im|qVnddO~L`gkInCA%dM98I{D5>Wt^BiTKqudiE^~B{R`Trbao(RR%6D9S` > zG0z<H%yCbY)N`D9jx$e$XzGcQdQLFU3FbM$JyBB6N#;4pJQ2F7Crau$#XP5&=M?uu > zNj;~T=QQ&~NT;4CsV8oSn7_^5w?m$J=D8<I<GFpX64C#a<^oQCE!%|#zE}0F5&iAz > zWKve#yXEn$_oa@n>ZkT)`#MhB3Hc~LGcXkH6j0Q80cG}`pl;|{`4N|)^c@4rdQM=O > zeVpY-UCzRt1IoG}u*^Q6l}&f-YDFF6Z>UNy;wig6px+P`ZC5uNndN@#&gV%L#-DYy > zukPbHtUkl1EP<4vACDJY_iufHhR2RR5=tNo;PFH$gcm&A1+}Qu!<SBb^xh-ypsOFc > zJbCPRTX)s*e|F}mv)O8?sJ+o%RoO<Yv+mfDhr7zIZ55A}`w!pC3|Z;z=5OV{@{@~S > zZ{4Xpx&G_B4|lBy29)p`#cO#_7n-9t${KY~KUsPGe3X84csuk7jugGo#iNl&hru|r > zJFO4y>A`yc@$R=NvtOU2c)Xi^rBid7k)v~FHowgM^t&_rar3LuKbpB8?dDPJ@O`|2 > zJ)w|(!Y#d}?^-tfJV>GSB&eECN>X=VQ)kt@HQ7?OT0uUYQ3d=vn^;ZM?dH}X&vkRF > zzSijGR@d$3R=pCsxz%;MxmB-(Zf<qmZf+Hlx%KaJYsCxlXOg2*pCVE2v&^c}uKSIj > zSsz~{nH3}5A9MgkW_|K>X4M>>YR_g?v;VI8A123Uq+Jhw4K~*q`e#~wy;QaeXEVLI > ze!#nvU&Q-F9=KOxep{~g-@2%Oy<V!<I%W}=pRSAgwkfX9k~rY=%{5w2=mpcdUvJ}1 > zDy~AJF)OltKdwu=?$lRjvQwS<&5hWeE_RO6hxc|YeXsICYpY$g_O}mmdV{Vw+nh`N > E0}->6TL1t6 > > literal 0 > HcmV?d00001 > diff --git a/tests/qtest/bios-tables-test-allowed-diff.h > b/tests/qtest/bios-tables-test-allowed-diff.h > index dfb8523c8b..90c53925fc 100644 > --- a/tests/qtest/bios-tables-test-allowed-diff.h > +++ b/tests/qtest/bios-tables-test-allowed-diff.h > @@ -1 +1,2 @@ > /* List of comma-separated changed AML files to ignore */ > +"tests/data/acpi/virt/DSDT.pxb", > diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c > index b4752c644c..91e91e0fec 100644 > --- a/tests/qtest/bios-tables-test.c > +++ b/tests/qtest/bios-tables-test.c > @@ -620,12 +620,21 @@ static void test_acpi_one(const char *params, test_data > *data) > * TODO: convert '-drive if=pflash' to new syntax (see e33763be7cd3) > * when arm/virt boad starts to support it. > */ > - args = g_strdup_printf("-machine %s %s -accel tcg -nodefaults > -nographic " > - "-drive if=pflash,format=raw,file=%s,readonly " > - "-drive if=pflash,format=raw,file=%s,snapshot=on -cdrom %s %s", > - data->machine, data->tcg_only ? "" : "-accel kvm", > - data->uefi_fl1, data->uefi_fl2, data->cd, params ? params : ""); > - > + if (data->cd) { > + args = g_strdup_printf("-machine %s %s -accel tcg " > + "-nodefaults -nographic " > + "-drive if=pflash,format=raw,file=%s,readonly " > + "-drive if=pflash,format=raw,file=%s,snapshot=on -cdrom %s > %s", > + data->machine, data->tcg_only ? "" : "-accel kvm", > + data->uefi_fl1, data->uefi_fl2, data->cd, params ? params : > ""); > + } else { > + args = g_strdup_printf("-machine %s %s -accel tcg " > + "-nodefaults -nographic " > + "-drive if=pflash,format=raw,file=%s,readonly " > + "-drive if=pflash,format=raw,file=%s,snapshot=on %s", > + data->machine, data->tcg_only ? "" : "-accel kvm", > + data->uefi_fl1, data->uefi_fl2, params ? params : ""); > + } > } else { > /* Disable kernel irqchip to be able to override apic irq0. */ > args = g_strdup_printf("-machine %s,kernel-irqchip=off %s -accel tcg > " > @@ -960,6 +969,38 @@ static void test_acpi_virt_tcg_numamem(void) > > } > > +static void test_acpi_virt_tcg_pxb(void) > +{ > + test_data data = { > + .machine = "virt", > + .tcg_only = true, > + .uefi_fl1 = "pc-bios/edk2-aarch64-code.fd", > + .uefi_fl2 = "pc-bios/edk2-arm-vars.fd", > + .ram_start = 0x40000000ULL, > + .scan_len = 128ULL * 1024 * 1024, > + }; > + /* > + * While using -cdrom, the cdrom would auto plugged into pxb-pcie, > + * the reason is the bus of pxb-pcie is also root bus, it would lead > + * to the error only PCI/PCIE bridge could plug onto pxb. > + * Therefore,thr cdrom is defined and plugged onto the scsi controller > + * to solve the conflicts. > + */ > + data.variant = ".pxb"; > + test_acpi_one(" -device pcie-root-port,chassis=1,id=pci.1" > + " -device virtio-scsi-pci,id=scsi0,bus=pci.1" > + " -drive file=" > + > "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2," > + "if=none,media=cdrom,id=drive-scsi0-0-0-1,readonly=on" > + " -device scsi-cd,bus=scsi0.0,scsi-id=0," > + "drive=drive-scsi0-0-0-1,id=scsi0-0-0-1,bootindex=1" > + " -cpu cortex-a57" > + " -device pxb-pcie,bus_nr=128", > + &data); > + > + free_test_data(&data); > +} > + > static void test_acpi_tcg_acpi_hmat(const char *machine) > { > test_data data; > @@ -1052,6 +1093,7 @@ int main(int argc, char *argv[]) > qtest_add_func("acpi/virt", test_acpi_virt_tcg); > qtest_add_func("acpi/virt/numamem", test_acpi_virt_tcg_numamem); > qtest_add_func("acpi/virt/memhp", test_acpi_virt_tcg_memhp); > + qtest_add_func("acpi/virt/pxb", test_acpi_virt_tcg_pxb); > } > ret = g_test_run(); > boot_sector_cleanup(disk); > -- > 2.19.1 >