On Mon, 24 Feb 2020 16:37:44 +0800 gengdongjiu <gengdong...@huawei.com> wrote:
> On 2020/2/21 22:09, Peter Maydell wrote: > > On Mon, 17 Feb 2020 at 13:10, Dongjiu Geng <gengdong...@huawei.com> wrote: > >> > >> In the ARMv8 platform, the CPU error types includes synchronous external > >> abort(SEA) and SError Interrupt (SEI). If exception happens in guest, host > >> does not know the detailed information of guest, so it is expected that > >> guest can do the recovery. > >> For example, if an exception happens in a guest user-space application, > >> host does > >> not know which application encounters errors, only guest knows it. > >> > >> For the ARMv8 SEA/SEI, KVM or host kernel delivers SIGBUS to notify > >> userspace. > >> After user space gets the notification, it will record the CPER into guest > >> GHES > >> buffer and inject an exception or IRQ to guest. > >> > >> In the current implementation, if the type of SIGBUS is BUS_MCEERR_AR, we > >> will > >> treat it as a synchronous exception, and notify guest with ARMv8 SEA > >> notification type after recording CPER into guest. > > > > Hi; I have reviewed the remaining arm bit of this series (patch 9), > > and made some comments on patch 1. Still to be reviewed are > > patches 4, 5, 6, 8: I'm going to assume that Michael or Igor > > will look at those. > > Thanks very much for Peter's review. > Michael/Igor, hope you can review patches 4, 5, 6, 8, thank you very much in > advance. done > > > > thanks > > -- PMM > > > > . > > >
