On Tue, Jun 28, 2011 at 03:09:38PM +0300, Avi Kivity wrote: > On 06/28/2011 03:07 PM, Jan Kiszka wrote: > > > > > > The point is that different buses have different widths. > > > target_phys_addr_t matches just one bus in the system. It needs to be > > > the maximum size of all buses present to be useful. > > > > Then we need a type for that. Or we need to demand that > > target_phys_addr_t is defined large enough to support all buses that the > > particular arch wants to address. Hardcoding 64 bit or anything is not > > appropriate for a generic subsystem. > > Okay, let's make t_p_a_t max(bus size in system). Do we have 32-bit > targets that don't support pci (I guess, pc-isa with cpu < ppro?). Do > we want to support a 32-bit variant of pci? It certainly existed at > some point.
PCI always had a mechanism for 64-bits addresses even on 32-bits wide bus, called Dual Address Cycle. I'm not sure which was rarer: devices which could handle it, or north bridges which could use it. Probably a tie. But in theory, it was there. OG.