This is an inspection yet. For ARM SMMU simulation, TARGET_PAGE_BITS_MIN is 10. All low bits of the TLB virtual address are used up by TLB flags and alignment flags. It's a little crowded. /* * ARMv7 and later CPUs have 4K pages minimum, but ARMv5 and v6 * have to support 1K tiny pages. */ # define TARGET_PAGE_BITS_VARY # define TARGET_PAGE_BITS_MIN 10
-- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1868527 Title: alignment may overlap the TLB flags Status in QEMU: Incomplete Bug description: Hi, In QEMU-4.2.0, or git-9b26a610936deaf436af9b7e39e4b7f0a35e4409, alignment may overlap the TLB flags. For example, the alignment: MO_ALIGN_32, MO_ALIGN_32 = 5 << MO_ASHIFT, and the TLB flag: TLB_DISCARD_WRITE #define TLB_DISCARD_WRITE (1 << (TARGET_PAGE_BITS_MIN - 6)) then, in the function "get_alignment_bits", the assert may fail: #if defined(CONFIG_SOFTMMU) /* The requested alignment cannot overlap the TLB flags. */ tcg_debug_assert((TLB_FLAGS_MASK & ((1 << a) - 1)) == 0); #endif However, the alignment of MO_ALIGN_32 is not used for now, so the assert cannot be triggered in current version. Anyway it seems like a potential conflict. To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/1868527/+subscriptions
