On Fri, 27 Mar 2020 13:11:08 +0100 Gerd Hoffmann <kra...@redhat.com> wrote:
> Add helper function to add fw_cfg device. > > Signed-off-by: Gerd Hoffmann <kra...@redhat.com> > Reviewed-by: Philippe Mathieu-Daudé <phi...@redhat.com> Reviewed-by: Igor Mammedov <imamm...@redhat.com> > --- > hw/i386/acpi-build-pc.c | 51 ++++++++++++++++++++++------------------- > 1 file changed, 28 insertions(+), 23 deletions(-) > > diff --git a/hw/i386/acpi-build-pc.c b/hw/i386/acpi-build-pc.c > index a9dbf080566b..3fdae2984b91 100644 > --- a/hw/i386/acpi-build-pc.c > +++ b/hw/i386/acpi-build-pc.c > @@ -1809,6 +1809,33 @@ static void build_smb0(Aml *table, I2CBus *smbus, int > devnr, int func) > aml_append(table, scope); > } > > +static void acpi_dsdt_add_fw_cfg(Aml *scope, FWCfgState *fw_cfg) > +{ > + /* > + * when using port i/o, the 8-bit data register *always* overlaps > + * with half of the 16-bit control register. Hence, the total size > + * of the i/o region used is FW_CFG_CTL_SIZE; when using DMA, the > + * DMA control register is located at FW_CFG_DMA_IO_BASE + 4 > + */ > + Object *obj = OBJECT(fw_cfg); > + uint8_t io_size = object_property_get_bool(obj, "dma_enabled", NULL) ? > + ROUND_UP(FW_CFG_CTL_SIZE, 4) + sizeof(dma_addr_t) : > + FW_CFG_CTL_SIZE; > + Aml *dev = aml_device("FWCF"); > + Aml *crs = aml_resource_template(); > + > + aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0002"))); > + > + /* device present, functioning, decoding, not shown in UI */ > + aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); > + > + aml_append(crs, > + aml_io(AML_DECODE16, FW_CFG_IO_BASE, FW_CFG_IO_BASE, 0x01, io_size)); > + > + aml_append(dev, aml_name_decl("_CRS", crs)); > + aml_append(scope, dev); > +} > + > static void > build_dsdt(GArray *table_data, BIOSLinker *linker, > AcpiPmInfo *pm, AcpiMiscInfo *misc, > @@ -2088,30 +2115,8 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, > > /* create fw_cfg node, unconditionally */ > { > - /* when using port i/o, the 8-bit data register *always* overlaps > - * with half of the 16-bit control register. Hence, the total size > - * of the i/o region used is FW_CFG_CTL_SIZE; when using DMA, the > - * DMA control register is located at FW_CFG_DMA_IO_BASE + 4 */ > - uint8_t io_size = object_property_get_bool(OBJECT(x86ms->fw_cfg), > - "dma_enabled", NULL) ? > - ROUND_UP(FW_CFG_CTL_SIZE, 4) + sizeof(dma_addr_t) : > - FW_CFG_CTL_SIZE; > - > scope = aml_scope("\\_SB.PCI0"); > - dev = aml_device("FWCF"); > - > - aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0002"))); > - > - /* device present, functioning, decoding, not shown in UI */ > - aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); > - > - crs = aml_resource_template(); > - aml_append(crs, > - aml_io(AML_DECODE16, FW_CFG_IO_BASE, FW_CFG_IO_BASE, 0x01, > io_size) > - ); > - aml_append(dev, aml_name_decl("_CRS", crs)); > - > - aml_append(scope, dev); > + acpi_dsdt_add_fw_cfg(scope, x86ms->fw_cfg); > aml_append(dsdt, scope); > } >