On 3/17/20 8:06 AM, LIU Zhiwei wrote:
> + if (s->vl_eq_vlmax) {
> +#ifdef TARGET_RISCV64
> + tcg_gen_gvec_dup_i64(s->sew, vreg_ofs(s, a->rd),
> + MAXSZ(s), MAXSZ(s), s1);
> +#else
> + tcg_gen_gvec_dup_i32(s->sew, vreg_ofs(s, a->rd),
> + MAXSZ(s), MAXSZ(s), s1);
> +#endif
Note to self: Add tcg_gen_gvec_dup_tl to tcg-op-gvec.h.
> + switch (s->sew) {
> + case 0:
> + tcg_gen_gvec_dup8i(vreg_ofs(s, a->rd),
> + MAXSZ(s), MAXSZ(s), simm);
> + break;
> + case 1:
> + tcg_gen_gvec_dup16i(vreg_ofs(s, a->rd),
> + MAXSZ(s), MAXSZ(s), simm);
> + break;
> + case 2:
> + tcg_gen_gvec_dup32i(vreg_ofs(s, a->rd),
> + MAXSZ(s), MAXSZ(s), simm);
> + break;
> + default:
> + tcg_gen_gvec_dup64i(vreg_ofs(s, a->rd),
> + MAXSZ(s), MAXSZ(s), simm);
> + break;
> + }
Note to self: Add tcg_gen_gvec_dup_imm(vece, ...).
Neither are your problem, but we should remember to update this code.
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
r~
