On 4/20/20 1:42 PM, Stephen Long wrote:
> +static bool trans_ST1_zprz_sve2(DisasContext *s, arg_ST1_zprz_sve2 *a)
> +{
> + gen_helper_gvec_mem_scatter *fn;
> + bool be = s->be_data == MO_BE;
> + bool mte = s->mte_active[0];
> +
> + if (!dc_isar_feature(aa64_sve2, s) || a->esz < a->msz
> + || (a->msz == 0 && a->scale)) {
> + return false;
> + }
> + if (!sve_access_check(s)) {
> + return true;
> + }
> + switch (a->esz) {
> + case MO_32:
> + fn = scatter_store_fn32[mte][be][a->xs][a->msz];
> + break;
> + case MO_64:
> + fn = scatter_store_fn64[mte][be][a->xs][a->msz];
> + break;
> + default:
> + g_assert_not_reached();
> + }
> + do_mem_zpz(s, a->rd, a->pg, a->rm, a->scale * a->msz,
> + cpu_reg_sp(s, a->rn), a->msz, true, fn);
> + return true;
> +}
I was thinking of something more along the lines of
static bool STNT1_zprz(DisasContext *s, arg_ST1_zprz *a)
{
if (!dc_isar_feature(aa64_sve2, s)) {
return false;
}
return trans_ST1_zprz(s, a);
}
The fields should be identical, and so decodetree should pick the same type for
'a', underneath all of the typedefs.
If decodetree cannot find a common argument set for the two insns, we might
need to help it along, like we do with e.g. &rri_esz. I don't know without
trying if that will be required.
r~
