On Thu, 7 May 2020 01:12:25 +0530
Kirti Wankhede <kwankh...@nvidia.com> wrote:
> On 5/6/2020 1:45 PM, Yan Zhao wrote:
> > On Mon, May 04, 2020 at 11:58:56PM +0800, Kirti Wankhede wrote:
>
> <snip>
>
> >> /*
> >> * Helper Functions for host iova-pfn list
> >> */
> >> @@ -567,6 +654,18 @@ static int vfio_iommu_type1_pin_pages(void
> >> *iommu_data,
> >> vfio_unpin_page_external(dma, iova, do_accounting);
> >> goto pin_unwind;
> >> }
> >> +
> >> + if (iommu->dirty_page_tracking) {
> >> + unsigned long pgshift =
> >> + __ffs(vfio_pgsize_bitmap(iommu));
> >> +
> > hi Kirti,
> > may I know if there's any vfio_pin_pages() happpening during NVidia's vGPU
> > migration?
> > the code would enter into deadlock as I reported in last version.
> >
>
> Hm, you are right and same is the case in vfio_iommu_type1_dma_rw_chunk().
>
> Instead of calling vfio_pgsize_bitmap() from lots of places, I'm
> thinking of saving pgsize_bitmap in struct vfio_iommu, which should be
> populated whenever domain_list is updated. Alex, will that be fine?
I've wondered why we don't already cache this, so yes, that's fine, but
the cached value will only be valid when evaluated under iommu->lock.
Thanks,
Alex
