On Wed, May 13, 2020 at 11:08:46AM -0700, Joe Komlodi wrote: > Increase the number of Microblaze registers QEMU will report when > talking to GDB.
Reviewed-by: Edgar E. Iglesias <edgar.igles...@xilinx.com> > > Signed-off-by: Joe Komlodi <koml...@xilinx.com> > --- > target/microblaze/cpu.c | 2 +- > target/microblaze/gdbstub.c | 52 > ++++++++++++++++++++++++++++++++++++++++++--- > 2 files changed, 50 insertions(+), 4 deletions(-) > > diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c > index 41cac1b..5b6ad5b 100644 > --- a/target/microblaze/cpu.c > +++ b/target/microblaze/cpu.c > @@ -331,7 +331,7 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data) > #endif > dc->vmsd = &vmstate_mb_cpu; > device_class_set_props(dc, mb_properties); > - cc->gdb_num_core_regs = 32 + 5; > + cc->gdb_num_core_regs = 32 + 27; > cc->gdb_get_dynamic_xml = mb_gdb_get_dynamic_xml; > cc->gdb_core_xml_file = "microblaze-core.xml"; > > diff --git a/target/microblaze/gdbstub.c b/target/microblaze/gdbstub.c > index cdca434..af29f00 100644 > --- a/target/microblaze/gdbstub.c > +++ b/target/microblaze/gdbstub.c > @@ -26,12 +26,37 @@ int mb_cpu_gdb_read_register(CPUState *cs, GByteArray > *mem_buf, int n) > MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); > CPUMBState *env = &cpu->env; > > + /* > + * GDB expects registers to be reported in this order: > + * R0-R31 > + * PC-BTR > + * PVR0-PVR11 > + * EDR-TLBHI > + * SLR-SHR > + */ > if (n < 32) { > return gdb_get_reg32(mem_buf, env->regs[n]); > } else { > - return gdb_get_reg32(mem_buf, env->sregs[n - 32]); > + n -= 32; > + switch (n) { > + case 0 ... 5: > + return gdb_get_reg32(mem_buf, env->sregs[n]); > + /* PVR12 is intentionally skipped */ > + case 6 ... 17: > + n -= 6; > + return gdb_get_reg32(mem_buf, env->pvr.regs[n]); > + case 18 ... 24: > + /* Add an offset of 6 to resume where we left off with SRegs */ > + n = n - 18 + 6; > + return gdb_get_reg32(mem_buf, env->sregs[n]); > + case 25: > + return gdb_get_reg32(mem_buf, env->slr); > + case 26: > + return gdb_get_reg32(mem_buf, env->shr); > + default: > + return 0; > + } > } > - return 0; > } > > int mb_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) > @@ -50,7 +75,28 @@ int mb_cpu_gdb_write_register(CPUState *cs, uint8_t > *mem_buf, int n) > if (n < 32) { > env->regs[n] = tmp; > } else { > - env->sregs[n - 32] = tmp; > + n -= 32; > + switch (n) { > + case 0 ... 5: > + env->sregs[n] = tmp; > + break; > + /* PVR12 is intentionally skipped */ > + case 6 ... 17: > + n -= 6; > + env->pvr.regs[n] = tmp; > + break; > + case 18 ... 24: > + /* Add an offset of 6 to resume where we left off with SRegs */ > + n = n - 18 + 6; > + env->sregs[n] = tmp; > + break; > + case 25: > + env->slr = tmp; > + break; > + case 26: > + env->shr = tmp; > + break; > + } > } > return 4; > } > -- > 2.7.4 >