At Thu, 14 Jul 2011 18:31:52 +0300, Blue Swirl wrote: > On Thu, Jul 14, 2011 at 12:13 PM, <tsnsa...@gmail.com> wrote: > > The softmmu version of current implementation is incorrect. > > Nonfaulting loads should generate exceptions in the same way as > > normal loads. The CPU hardware should not return zero automatically > > if no memory mapping exists. The system software is responsible for > > nonfaulting loads to read zero if no mapping is availale. > > > > The differences between nonfaulting loads and normal loads are: > > - that DSFSR.NF bit is set for nonfaulting loads on MMU faults. > > - the result of loads on memory region mapped by TTEs with NFO bit set. > > I hope this is documented somewhere.
In the UA2007 spec it is partly documented in "9.6 Nonfaulting Load", but I couldn't find out the description of the SFSR (Synchronous Fault Status Register) in UA2007... In the JPS1 spec, the SFSR register is described in F.10.9. ---- Tsuneo Saito <tsnsa...@gmail.com>
