On 15/06/2020 02.52, Huacai Chen wrote: > Hi, Aleksandar, > > On Sun, Jun 14, 2020 at 4:07 PM Aleksandar Markovic > <aleksandar.qemu.de...@gmail.com> wrote: >> >> >> >> уто, 2. јун 2020. у 04:38 Huacai Chen <zltjiang...@gmail.com> је написао/ла: >>> >>> MIPS has two types of KVM: TE & VZ, and TE is the default type. Now we >>> can't create a VZ guest in QEMU because it lacks the kvm_type() hook in >>> MachineClass. Besides, libvirt uses a null-machine to detect the kvm >>> capability, so by default it will return "KVM not supported" on a VZ >>> platform. Thus, null-machine also need the kvm_type() hook. >>> >>> Reviewed-by: Aleksandar Markovic <aleksandar.qemu.de...@gmail.com> >>> Signed-off-by: Huacai Chen <che...@lemote.com> >>> Co-developed-by: Jiaxun Yang <jiaxun.y...@flygoat.com> >>> --- >> >> Huacai, >> >> Please take a look at Peter's remarks at: >> >> https://lists.gnu.org/archive/html/qemu-devel/2020-06/msg01878.html >> >> ...and refactor this patch for v5. My general advice: The simpler, the >> batter. >> > OK, I will rework this patch.
Hi, is there maybe also a way to do this without moving null-machine.o from common-obj-y to obj-y, and to avoid the target-specific hacks in this file ? We just moved the null-machine from obj-y to common-obj-y two years ago (see commit 3858ff763985fb9e), since it's more desirable to have as much code in common-obj to save compilation time and maybe to be able to link a qemu with more than one target CPU in one binary one day... ppc64 has also more than one kvm_type (kvm-hv and kvm-pr), and apparently it also works without hacks to the null-machine code there ... so maybe you can peek into the ppc64 code to see how it is solved there? Thomas >>> hw/core/Makefile.objs | 2 +- >>> hw/core/null-machine.c | 4 ++++ >>> hw/mips/Makefile.objs | 2 +- >>> hw/mips/common.c | 42 ++++++++++++++++++++++++++++++++++++++++++ >>> include/hw/mips/mips.h | 3 +++ >>> 5 files changed, 51 insertions(+), 2 deletions(-) >>> create mode 100644 hw/mips/common.c >>> >>> diff --git a/hw/core/Makefile.objs b/hw/core/Makefile.objs >>> index 1d540ed..b5672f4 100644 >>> --- a/hw/core/Makefile.objs >>> +++ b/hw/core/Makefile.objs >>> @@ -17,11 +17,11 @@ common-obj-$(CONFIG_SOFTMMU) += >>> vm-change-state-handler.o >>> common-obj-$(CONFIG_SOFTMMU) += qdev-properties-system.o >>> common-obj-$(CONFIG_SOFTMMU) += sysbus.o >>> common-obj-$(CONFIG_SOFTMMU) += machine.o >>> -common-obj-$(CONFIG_SOFTMMU) += null-machine.o >>> common-obj-$(CONFIG_SOFTMMU) += loader.o >>> common-obj-$(CONFIG_SOFTMMU) += machine-hmp-cmds.o >>> common-obj-$(CONFIG_SOFTMMU) += numa.o >>> common-obj-$(CONFIG_SOFTMMU) += clock-vmstate.o >>> +obj-$(CONFIG_SOFTMMU) += null-machine.o >>> obj-$(CONFIG_SOFTMMU) += machine-qmp-cmds.o >>> >>> common-obj-$(CONFIG_EMPTY_SLOT) += empty_slot.o >>> diff --git a/hw/core/null-machine.c b/hw/core/null-machine.c >>> index cb47d9d..94a36f9 100644 >>> --- a/hw/core/null-machine.c >>> +++ b/hw/core/null-machine.c >>> @@ -17,6 +17,7 @@ >>> #include "sysemu/sysemu.h" >>> #include "exec/address-spaces.h" >>> #include "hw/core/cpu.h" >>> +#include "hw/mips/mips.h" >>> >>> static void machine_none_init(MachineState *mch) >>> { >>> @@ -50,6 +51,9 @@ static void machine_none_machine_init(MachineClass *mc) >>> mc->max_cpus = 1; >>> mc->default_ram_size = 0; >>> mc->default_ram_id = "ram"; >>> +#ifdef TARGET_MIPS >>> + mc->kvm_type = mips_kvm_type; >>> +#endif >>> } >>> >>> DEFINE_MACHINE("none", machine_none_machine_init) >>> diff --git a/hw/mips/Makefile.objs b/hw/mips/Makefile.objs >>> index 739e2b7..3b3e6ea 100644 >>> --- a/hw/mips/Makefile.objs >>> +++ b/hw/mips/Makefile.objs >>> @@ -1,4 +1,4 @@ >>> -obj-y += addr.o mips_int.o >>> +obj-y += addr.o common.o mips_int.o >>> obj-$(CONFIG_R4K) += r4k.o >>> obj-$(CONFIG_MALTA) += gt64xxx_pci.o malta.o >>> obj-$(CONFIG_MIPSSIM) += mipssim.o >>> diff --git a/hw/mips/common.c b/hw/mips/common.c >>> new file mode 100644 >>> index 0000000..4d8e141 >>> --- /dev/null >>> +++ b/hw/mips/common.c >>> @@ -0,0 +1,42 @@ >>> +/* >>> + * Common MIPS routines >>> + * >>> + * Copyright (c) 2020 Huacai Chen (che...@lemote.com) >>> + * This code is licensed under the GNU GPL v2. >>> + */ >>> + >>> +#include <linux/kvm.h> >>> +#include "qemu/osdep.h" >>> +#include "qemu-common.h" >>> +#include "hw/boards.h" >>> +#include "hw/mips/mips.h" >>> +#include "sysemu/kvm_int.h" >>> + >>> +#ifndef CONFIG_KVM >>> + >>> +int mips_kvm_type(MachineState *machine, const char *vm_type) >>> +{ >>> + return 0; >>> +} >>> + >>> +#else >>> + >>> +int mips_kvm_type(MachineState *machine, const char *vm_type) >>> +{ >>> + int r; >>> + KVMState *s = KVM_STATE(machine->accelerator); >>> + >>> + r = kvm_check_extension(s, KVM_CAP_MIPS_VZ); >>> + if (r > 0) { >>> + return KVM_VM_MIPS_VZ; >>> + } >>> + >>> + r = kvm_check_extension(s, KVM_CAP_MIPS_TE); >>> + if (r > 0) { >>> + return KVM_VM_MIPS_TE; >>> + } >>> + >>> + return -1; >>> +} >>> + >>> +#endif >>> diff --git a/include/hw/mips/mips.h b/include/hw/mips/mips.h >>> index 0af4c3d..2ac0580 100644 >>> --- a/include/hw/mips/mips.h >>> +++ b/include/hw/mips/mips.h >>> @@ -20,4 +20,7 @@ void rc4030_dma_write(void *dma, uint8_t *buf, int len); >>> >>> DeviceState *rc4030_init(rc4030_dma **dmas, IOMMUMemoryRegion **dma_mr); >>> >>> +/* common.c */ >>> +int mips_kvm_type(MachineState *machine, const char *vm_type); >>> + >>> #endif >>> -- >>> 2.7.0 >>> >