From: "Emilio G. Cota" <c...@braap.org> Cc: Aurelien Jarno <aurel...@aurel32.net> Cc: Aleksandar Markovic <aleksandar.qemu.de...@gmail.com> Reviewed-by: Richard Henderson <richard.hender...@linaro.org> Signed-off-by: Emilio G. Cota <c...@braap.org> Signed-off-by: Robert Foley <robert.fo...@linaro.org> --- target/mips/cpu.c | 7 ++++--- target/mips/kvm.c | 2 +- 2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/target/mips/cpu.c b/target/mips/cpu.c index e86cd06548..761d8aaa54 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -56,13 +56,14 @@ static bool mips_cpu_has_work(CPUState *cs) MIPSCPU *cpu = MIPS_CPU(cs); CPUMIPSState *env = &cpu->env; bool has_work = false; + uint32_t interrupt_request = cpu_interrupt_request(cs); /* * Prior to MIPS Release 6 it is implementation dependent if non-enabled * interrupts wake-up the CPU, however most of the implementations only * check for interrupts that can be taken. */ - if ((cs->interrupt_request & CPU_INTERRUPT_HARD) && + if ((interrupt_request & CPU_INTERRUPT_HARD) && cpu_mips_hw_interrupts_pending(env)) { if (cpu_mips_hw_interrupts_enabled(env) || (env->insn_flags & ISA_MIPS32R6)) { @@ -76,7 +77,7 @@ static bool mips_cpu_has_work(CPUState *cs) * The QEMU model will issue an _WAKE request whenever the CPUs * should be woken up. */ - if (cs->interrupt_request & CPU_INTERRUPT_WAKE) { + if (interrupt_request & CPU_INTERRUPT_WAKE) { has_work = true; } @@ -86,7 +87,7 @@ static bool mips_cpu_has_work(CPUState *cs) } /* MIPS Release 6 has the ability to halt the CPU. */ if (env->CP0_Config5 & (1 << CP0C5_VP)) { - if (cs->interrupt_request & CPU_INTERRUPT_WAKE) { + if (interrupt_request & CPU_INTERRUPT_WAKE) { has_work = true; } if (!mips_vp_active(env)) { diff --git a/target/mips/kvm.c b/target/mips/kvm.c index 92608cfe15..682b969579 100644 --- a/target/mips/kvm.c +++ b/target/mips/kvm.c @@ -141,7 +141,7 @@ void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run) qemu_mutex_lock_iothread(); - if ((cs->interrupt_request & CPU_INTERRUPT_HARD) && + if ((cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD) && cpu_mips_io_interrupts_pending(cpu)) { intr.cpu = -1; intr.irq = 2; -- 2.17.1